1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
11 audio data transfer between devices in the system.
14 - Heiko Stuebner <heiko@sntech.de>
19 - const: rockchip,rk3066-i2s
31 - const: rockchip,rk3066-i2s
41 - description: clock for I2S controller
42 - description: clock for I2S BUS
51 - description: TX DMA Channel
52 - description: RX DMA Channel
59 rockchip,capture-channels:
60 $ref: /schemas/types.yaml#/definitions/uint32
63 Max capture channels, if not set, 2 channels default.
65 rockchip,playback-channels:
66 $ref: /schemas/types.yaml#/definitions/uint32
69 Max playback channels, if not set, 8 channels default.
72 $ref: /schemas/types.yaml#/definitions/phandle
74 The phandle of the syscon node for the GRF register.
75 Required property for controllers which support multi channel
91 additionalProperties: false
95 #include <dt-bindings/clock/rk3288-cru.h>
96 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 #include <dt-bindings/interrupt-controller/irq.h>
99 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
100 reg = <0xff890000 0x10000>;
101 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
102 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
103 clock-names = "i2s_clk", "i2s_hclk";
104 dmas = <&pdma1 0>, <&pdma1 1>;
105 dma-names = "tx", "rx";
106 rockchip,capture-channels = <2>;
107 rockchip,playback-channels = <8>;
108 #sound-dai-cells = <0>;