1 * Rockchip I2S controller
3 The I2S bus (Inter-IC sound bus) is a serial link for digital
4 audio data transfer between devices in the system.
8 - compatible: should be one of the following:
9 - "rockchip,rk3066-i2s": for rk3066
10 - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
11 - "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
12 - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
13 - "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
14 - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
15 - "rockchip,rk3328-i2s", "rockchip,rk3066-i2s": for rk3328
16 - "rockchip,rk3366-i2s", "rockchip,rk3066-i2s": for rk3366
17 - "rockchip,rk3368-i2s", "rockchip,rk3066-i2s": for rk3368
18 - "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
19 - reg: physical base address of the controller and length of memory mapped
21 - interrupts: should contain the I2S interrupt.
22 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
23 Documentation/devicetree/bindings/dma/dma.txt
24 - dma-names: should include "tx" and "rx".
25 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
26 - clock-names: should contain the following:
27 - "i2s_hclk": clock for I2S BUS
28 - "i2s_clk" : clock for I2S controller
29 - rockchip,playback-channels: max playback channels, if not set, 8 channels default.
30 - rockchip,capture-channels: max capture channels, if not set, 2 channels default.
32 Required properties for controller which support multi channels
35 - rockchip,grf: the phandle of the syscon node for GRF register.
37 Example for rk3288 I2S controller:
40 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
41 reg = <0xff890000 0x10000>;
42 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
43 dmas = <&pdma1 0>, <&pdma1 1>;
44 dma-names = "tx", "rx";
45 clock-names = "i2s_hclk", "i2s_clk";
46 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
47 rockchip,playback-channels = <8>;
48 rockchip,capture-channels = <2>;