1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 AHUB Device Tree Bindings
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
12 crossbar for routing audio data across these accelerators. It has
13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
14 engine through ADMAIF.
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
27 - nvidia,tegra210-ahub
28 - nvidia,tegra186-ahub
30 - const: nvidia,tegra194-ahub
31 - const: nvidia,tegra186-ahub
45 assigned-clock-parents:
60 $ref: /schemas/graph.yaml#/properties/ports
62 Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
63 These are connected to ACIF interfaces of AHUB clients. Thus the
64 number of port nodes depend on the number of clients that AHUB may
65 have depending on the SoC revision.
69 $ref: audio-graph-port.yaml#
70 unevaluatedProperties: false
78 $ref: nvidia,tegra210-dmic.yaml#
82 $ref: nvidia,tegra210-admaif.yaml#
86 $ref: nvidia,tegra186-dspk.yaml#
94 - assigned-clock-parents
99 additionalProperties: false
103 #include<dt-bindings/clock/tegra210-car.h>
106 compatible = "nvidia,tegra210-ahub";
107 reg = <0x702d0800 0x800>;
108 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
109 clock-names = "ahub";
110 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
111 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
112 #address-cells = <1>;
114 ranges = <0x702d0000 0x702d0000 0x0000e400>;
116 // All AHUB child nodes below
118 compatible = "nvidia,tegra210-admaif";
119 reg = <0x702d0000 0x800>;
120 dmas = <&adma 1>, <&adma 1>,
121 <&adma 2>, <&adma 2>,
122 <&adma 3>, <&adma 3>,
123 <&adma 4>, <&adma 4>,
124 <&adma 5>, <&adma 5>,
125 <&adma 6>, <&adma 6>,
126 <&adma 7>, <&adma 7>,
127 <&adma 8>, <&adma 8>,
128 <&adma 9>, <&adma 9>,
129 <&adma 10>, <&adma 10>;
130 dma-names = "rx1", "tx1",
143 compatible = "nvidia,tegra210-i2s";
144 reg = <0x702d1000 0x100>;
145 clocks = <&tegra_car TEGRA210_CLK_I2S0>;
147 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
148 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
149 assigned-clock-rates = <1536000>;
150 sound-name-prefix = "I2S1";
154 compatible = "nvidia,tegra210-dmic";
155 reg = <0x702d4000 0x100>;
156 clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
157 clock-names = "dmic";
158 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
159 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
160 assigned-clock-rates = <3072000>;
161 sound-name-prefix = "DMIC1";
164 // More child nodes to follow