1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 AHUB Device Tree Bindings
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
12 crossbar for routing audio data across these accelerators. It has
13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
14 engine through ADMAIF.
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
21 - $ref: audio-graph-port.yaml#
25 pattern: "^ahub@[0-9a-f]*$"
30 - nvidia,tegra210-ahub
31 - nvidia,tegra186-ahub
33 - const: nvidia,tegra194-ahub
34 - const: nvidia,tegra186-ahub
48 assigned-clock-parents:
64 Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
65 These are connected to ACIF interfaces of AHUB clients. Thus the
66 number of port nodes depend on the number of clients that AHUB may
67 have depending on the SoC revision.
75 - assigned-clock-parents
80 unevaluatedProperties: false
84 #include<dt-bindings/clock/tegra210-car.h>
87 compatible = "nvidia,tegra210-ahub";
88 reg = <0x702d0800 0x800>;
89 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
91 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
92 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
95 ranges = <0x702d0000 0x702d0000 0x0000e400>;
97 // All AHUB child nodes below
99 compatible = "nvidia,tegra210-admaif";
100 reg = <0x702d0000 0x800>;
101 dmas = <&adma 1>, <&adma 1>,
102 <&adma 2>, <&adma 2>,
103 <&adma 3>, <&adma 3>,
104 <&adma 4>, <&adma 4>,
105 <&adma 5>, <&adma 5>,
106 <&adma 6>, <&adma 6>,
107 <&adma 7>, <&adma 7>,
108 <&adma 8>, <&adma 8>,
109 <&adma 9>, <&adma 9>,
110 <&adma 10>, <&adma 10>;
111 dma-names = "rx1", "tx1",
124 compatible = "nvidia,tegra210-i2s";
125 reg = <0x702d1000 0x100>;
126 clocks = <&tegra_car TEGRA210_CLK_I2S0>;
128 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
129 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
130 assigned-clock-rates = <1536000>;
131 sound-name-prefix = "I2S1";
135 compatible = "nvidia,tegra210-dmic";
136 reg = <0x702d4000 0x100>;
137 clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
138 clock-names = "dmic";
139 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
140 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
141 assigned-clock-rates = <3072000>;
142 sound-name-prefix = "DMIC1";
145 // More child nodes to follow