1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 ADMAIF Device Tree Bindings
10 ADMAIF is the interface between ADMA and AHUB. Each ADMA channel
11 that sends/receives data to/from AHUB must interface through an
12 ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF
13 Tx channel and ADMA channel receiving data from AHUB pairs with
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^admaif@[0-9a-f]*$"
27 - nvidia,tegra210-admaif
28 - nvidia,tegra186-admaif
30 - const: nvidia,tegra194-admaif
31 - const: nvidia,tegra186-admaif
41 $ref: /schemas/graph.yaml#/properties/ports
43 Contains list of ACIF (Audio CIF) port nodes for ADMAIF channels.
44 The number of port nodes depends on the number of ADMAIF channels
45 that SoC may have. These are interfaced with respective ACIF ports
46 in AHUB (Audio Hub). Each port is capable of data transfers in
51 $ref: audio-graph-port.yaml#
52 unevaluatedProperties: false
58 const: nvidia,tegra210-admaif
64 DMA channel specifiers, equally divided for Tx and Rx.
69 pattern: "^[rt]x(10|[1-9])$"
71 Should be "rx1", "rx2" ... "rx10" for DMA Rx channel
72 Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
80 DMA channel specifiers, equally divided for Tx and Rx.
85 pattern: "^[rt]x(1[0-9]|[1-9]|20)$"
87 Should be "rx1", "rx2" ... "rx20" for DMA Rx channel
88 Should be "tx1", "tx2" ... "tx20" for DMA Tx channel
98 additionalProperties: false
103 compatible = "nvidia,tegra210-admaif";
104 reg = <0x702d0000 0x800>;
105 dmas = <&adma 1>, <&adma 1>,
106 <&adma 2>, <&adma 2>,
107 <&adma 3>, <&adma 3>,
108 <&adma 4>, <&adma 4>,
109 <&adma 5>, <&adma 5>,
110 <&adma 6>, <&adma 6>,
111 <&adma 7>, <&adma 7>,
112 <&adma 8>, <&adma 8>,
113 <&adma 9>, <&adma 9>,
114 <&adma 10>, <&adma 10>;
115 dma-names = "rx1", "tx1",