1 * Amlogic Audio PDM input
4 - compatible: 'amlogic,axg-pdm'
5 - reg: physical base address of the controller and length of memory
7 - clocks: list of clock phandle, one for each entry clock-names.
8 - clock-names: should contain the following:
9 * "pclk" : peripheral clock.
10 * "dclk" : pdm digital clock
11 * "sysclk" : dsp system clock
12 - #sound-dai-cells: must be 0.
14 Example of PDM on the A113 SoC:
16 pdm: audio-controller@ff632000 {
17 compatible = "amlogic,axg-pdm";
18 reg = <0x0 0xff632000 0x0 0x34>;
19 #sound-dai-cells = <0>;
20 clocks = <&clkc_audio AUD_CLKID_PDM>,
21 <&clkc_audio AUD_CLKID_PDM_DCLK>,
22 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
23 clock-names = "pclk", "dclk", "sysclk";