1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Atmel Timer Counter Block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
14 timer has three channels with two counters each.
20 - atmel,at91rm9200-tcb
21 - atmel,at91sam9x5-tcb
31 List of interrupts. One interrupt per TCB channel if available or one
32 interrupt for the TC block
38 List of clock names. Always includes t0_clk and slow clk. Also includes
39 t1_clk and t2_clk if a clock per channel is available.
55 description: The timer block channels that are used as timers.
59 const: atmel,tcb-timer
62 List of channels to use for this particular timer.
75 const: atmel,sama5d2-tcb
111 additionalProperties: false
115 /* One interrupt per TC block: */
116 tcb0: timer@fff7c000 {
117 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
118 #address-cells = <1>;
120 reg = <0xfff7c000 0x100>;
122 clocks = <&tcb0_clk>, <&clk32k>;
123 clock-names = "t0_clk", "slow_clk";
126 compatible = "atmel,tcb-timer";
131 compatible = "atmel,tcb-timer";
136 /* One interrupt per TC channel in a TC block: */
137 tcb1: timer@fffdc000 {
138 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
139 #address-cells = <1>;
141 reg = <0xfffdc000 0x100>;
142 interrupts = <26 4>, <27 4>, <28 4>;
143 clocks = <&tcb1_clk>, <&clk32k>;
144 clock-names = "t0_clk", "slow_clk";
147 compatible = "atmel,tcb-timer";
152 compatible = "atmel,tcb-timer";