1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/serial/sifive-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive asynchronous serial interface (UART)
10 - Pragnesh Patel <pragnesh.patel@sifive.com>
11 - Paul Walmsley <paul.walmsley@sifive.com>
12 - Palmer Dabbelt <palmer@sifive.com>
15 - $ref: /schemas/serial.yaml#
21 - sifive,fu540-c000-uart
22 - sifive,fu740-c000-uart
26 Should be something similar to "sifive,<chip>-uart"
27 for the UART as integrated on a particular chip,
28 and "sifive,uart<version>" for the general UART IP
29 block programming model.
31 UART HDL that corresponds to the IP block version
32 numbers can be found here -
34 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart
51 additionalProperties: false
55 #include <dt-bindings/clock/sifive-fu540-prci.h>
57 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
58 interrupt-parent = <&plic0>;
60 reg = <0x10010000 0x1000>;
61 clocks = <&prci PRCI_CLK_TLCLK>;