1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
5 $id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Alexandre Belloni <alexandre.belloni@bootlin.com>
20 - const: atmel,at91sam9260-rtt
23 - microchip,sam9x60-rtt
24 - microchip,sam9x7-rtt
25 - const: atmel,at91sam9260-rtt
27 - const: microchip,sama7g5-rtt
28 - const: microchip,sam9x60-rtt
29 - const: atmel,at91sam9260-rtt
40 atmel,rtt-rtc-time-reg:
41 $ref: /schemas/types.yaml#/definitions/phandle-array
44 - description: Phandle to the GPBR node.
45 - description: Offset within the GPBR block.
47 Should encode the GPBR register used to store the time base when the
48 RTT is used as an RTC. The first cell should point to the GPBR node
49 and the second one encodes the offset within the GPBR block (or in
50 other words, the GPBR register used to store the time base).
57 - atmel,rtt-rtc-time-reg
59 unevaluatedProperties: false
63 #include <dt-bindings/interrupt-controller/irq.h>
66 compatible = "atmel,at91sam9260-rtt";
67 reg = <0xfffffd20 0x10>;
68 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
70 atmel,rtt-rtc-time-reg = <&gpbr 0x0>;