1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright (C) STMicroelectronics 2019.
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STM32 GPIO and Pin Mux/Config controller
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
14 STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
15 controller. It controls the input/output settings on the available pins and
16 also provides ability to multiplex and configure the output of various
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
26 - st,stm32h743-pinctrl
27 - st,stm32mp135-pinctrl
28 - st,stm32mp157-pinctrl
29 - st,stm32mp157-z-pinctrl
30 - st,stm32mp257-pinctrl
31 - st,stm32mp257-z-pinctrl
40 $ref: /schemas/types.yaml#/definitions/flag
48 description: Phandle+args to the syscon node which includes IRQ mux selection.
49 $ref: /schemas/types.yaml#/definitions/phandle-array
53 - description: syscon node which includes IRQ mux selection
54 - description: The offset of the IRQ mux selection register
55 - description: The field mask of IRQ mux, needed if different of 0xf
59 Indicates the SOC package used.
60 More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
61 $ref: /schemas/types.yaml#/definitions/uint32
62 enum: [0x1, 0x2, 0x4, 0x8, 0x100, 0x400, 0x800]
67 additionalProperties: false
72 interrupt-controller: true
88 Number of available gpios in a bank.
94 Should be a name string for this bank as specified in the datasheet.
95 $ref: /schemas/types.yaml#/definitions/string
112 Should correspond to the EXTI IOport selection (EXTI line used
113 to select GPIOs as interrupts).
114 $ref: /schemas/types.yaml#/definitions/uint32
119 "^(.+-hog(-[0-9]+)?)$":
133 additionalProperties: false
138 additionalProperties: false
140 A pinctrl node should contain at least one subnode representing the
141 pinctrl group available on the machine. Each subnode will list the
142 pins it needs, and how they should be configured, with regard to muxer
143 configuration, pullups, drive, output high/low and output speed.
146 $ref: /schemas/types.yaml#/definitions/uint32-array
148 Integer array, represents gpio pin number and mux setting.
149 Supported pin number and mux varies for different SoCs, and are
150 defined in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
151 These defines are calculated as: ((port * 16 + line) << 8) | function
153 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
154 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
155 - function: The function number, can be:
157 * 1 : Alternate Function 0
158 * 2 : Alternate Function 1
159 * 3 : Alternate Function 2
161 * 16 : Alternate Function 15
163 To simplify the usage, macro is available to generate "pinmux" field.
164 This macro is available here:
165 - include/dt-bindings/pinctrl/stm32-pinfunc.h
166 Some examples of using macro:
167 /* GPIO A9 set as alernate function 2 */
169 pinmux = <STM32_PINMUX('A', 9, AF2)>;
171 /* GPIO A9 set as GPIO */
173 pinmux = <STM32_PINMUX('A', 9, GPIO)>;
175 /* GPIO A9 set as analog */
177 pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
200 $ref: /schemas/types.yaml#/definitions/uint32
207 - $ref: pinctrl.yaml#
215 additionalProperties: false
219 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
220 #include <dt-bindings/mfd/stm32f4-rcc.h>
223 #address-cells = <1>;
225 compatible = "st,stm32f429-pinctrl";
226 ranges = <0 0x40020000 0x3000>;
232 resets = <&reset_ahb1 0>;
233 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
234 st,bank-name = "GPIOA";
238 //Example 2 (using gpio-ranges)
240 #address-cells = <1>;
242 compatible = "st,stm32f429-pinctrl";
243 ranges = <0 0x50020000 0x3000>;
248 reg = <0x1000 0x400>;
249 resets = <&reset_ahb1 0>;
250 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
251 st,bank-name = "GPIOB";
252 gpio-ranges = <&pinctrl 0 0 16>;
258 reg = <0x2000 0x400>;
259 resets = <&reset_ahb1 0>;
260 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
261 st,bank-name = "GPIOC";
263 gpio-ranges = <&pinctrl 0 16 3>,
268 //Example 3 pin groups
270 usart1_pins_a: usart1-0 {
272 pinmux = <STM32_PINMUX('A', 9, AF7)>;
278 pinmux = <STM32_PINMUX('A', 10, AF7)>;
285 pinctrl-0 = <&usart1_pins_a>;
286 pinctrl-names = "default";