1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
25 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
26 if the device is on an spmi bus or an ssbi bus respectively
30 Value type: <prop-encoded-array>
31 Definition: Register base of the GPIO block and length.
35 Value type: <prop-encoded-array>
36 Definition: Must contain an array of encoded interrupt specifiers for
42 Definition: Mark the device node as a GPIO controller
47 Definition: Must be 2;
48 the first cell will be used to define gpio number and the
49 second denotes the flags for this gpio
51 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
52 a general description of GPIO and interrupt bindings.
54 Please refer to pinctrl-bindings.txt in this directory for details of the
55 common pinctrl bindings used by client devices, including the meaning of the
56 phrase "pin configuration node".
58 The pin configuration nodes act as a container for an arbitrary number of
59 subnodes. Each of these subnodes represents some desired configuration for a
60 pin or a list of pins. This configuration can include the
61 mux function to select on those pin(s), and various pin configuration
62 parameters, as listed below.
67 The name of each subnode is not important; all subnodes should be enumerated
68 and processed purely based on their content.
70 Each subnode only affects those parameters that are explicitly listed. In
71 other words, a subnode that lists a mux function but no pin configuration
72 parameters implies no information about any pin configuration parameters.
73 Similarly, a pin subnode that describes a pullup parameter implies no
74 information about e.g. the mux function.
76 The following generic properties as defined in pinctrl-bindings.txt are valid
77 to specify in a pin configuration subnode:
81 Value type: <string-array>
82 Definition: List of gpio pins affected by the properties specified in
83 this subnode. Valid pins are:
84 gpio1-gpio4 for pm8005
85 gpio1-gpio6 for pm8018
86 gpio1-gpio12 for pm8038
87 gpio1-gpio40 for pm8058
88 gpio1-gpio4 for pm8916
89 gpio1-gpio38 for pm8917
90 gpio1-gpio44 for pm8921
91 gpio1-gpio36 for pm8941
92 gpio1-gpio22 for pm8994
93 gpio1-gpio26 for pm8998
94 gpio1-gpio22 for pma8084
95 gpio1-gpio10 for pmi8994
96 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
101 Definition: Specify the alternative function to be configured for the
102 specified pins. Valid values are:
111 And following values are supported by LV/MV GPIO subtypes:
118 Definition: The specified pins should be configured as no pull.
123 Definition: The specified pins should be configured as pull down.
128 Definition: The specified pins should be configured as pull up.
130 - qcom,pull-up-strength:
133 Definition: Specifies the strength to use for pull up, if selected.
134 Valid values are; as defined in
135 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
136 1: 30uA (PMIC_GPIO_PULL_UP_30)
137 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
138 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
139 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
140 If this property is omitted 30uA strength will be used if
143 - bias-high-impedance:
146 Definition: The specified pins will put in high-Z mode and disabled.
151 Definition: The specified pins are put in input mode.
156 Definition: The specified pins are configured in output mode, driven
162 Definition: The specified pins are configured in output mode, driven
168 Definition: Selects the power source for the specified pins. Valid
169 power sources are defined per chip in
170 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
172 - qcom,drive-strength:
175 Definition: Selects the drive strength for the specified pins. Value
177 0: no (PMIC_GPIO_STRENGTH_NO)
178 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
179 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
180 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
181 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
186 Definition: The specified pins are configured in push-pull mode.
191 Definition: The specified pins are configured in open-drain mode.
196 Definition: The specified pins are configured in open-source mode.
201 Definition: The specified pins are configured in analog-pass-through mode.
206 Definition: Selects ATEST rail to route to GPIO when it's configured
207 in analog-pass-through mode.
208 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
213 Definition: Selects DTEST rail to route to GPIO when it's configured
215 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
219 pm8921_gpio: gpio@150 {
220 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
222 interrupts = <192 1>, <193 1>, <194 1>,
223 <195 1>, <196 1>, <197 1>,
224 <198 1>, <199 1>, <200 1>,
225 <201 1>, <202 1>, <203 1>,
226 <204 1>, <205 1>, <206 1>,
227 <207 1>, <208 1>, <209 1>,
228 <210 1>, <211 1>, <212 1>,
229 <213 1>, <214 1>, <215 1>,
230 <216 1>, <217 1>, <218 1>,
231 <219 1>, <220 1>, <221 1>,
232 <222 1>, <223 1>, <224 1>,
233 <225 1>, <226 1>, <227 1>,
234 <228 1>, <229 1>, <230 1>,
235 <231 1>, <232 1>, <233 1>,
241 pm8921_gpio_keys: gpio-keys {
243 pins = "gpio20", "gpio21";
249 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
250 power-source = <PM8921_GPIO_S4>;