1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
42 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
43 if the device is on an spmi bus or an ssbi bus respectively
47 Value type: <prop-encoded-array>
48 Definition: Register base of the GPIO block and length.
52 Value type: <prop-encoded-array>
53 Definition: Must contain an array of encoded interrupt specifiers for
59 Definition: Mark the device node as a GPIO controller
64 Definition: Must be 2;
65 the first cell will be used to define gpio number and the
66 second denotes the flags for this gpio
68 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
69 a general description of GPIO and interrupt bindings.
71 Please refer to pinctrl-bindings.txt in this directory for details of the
72 common pinctrl bindings used by client devices, including the meaning of the
73 phrase "pin configuration node".
75 The pin configuration nodes act as a container for an arbitrary number of
76 subnodes. Each of these subnodes represents some desired configuration for a
77 pin or a list of pins. This configuration can include the
78 mux function to select on those pin(s), and various pin configuration
79 parameters, as listed below.
84 The name of each subnode is not important; all subnodes should be enumerated
85 and processed purely based on their content.
87 Each subnode only affects those parameters that are explicitly listed. In
88 other words, a subnode that lists a mux function but no pin configuration
89 parameters implies no information about any pin configuration parameters.
90 Similarly, a pin subnode that describes a pullup parameter implies no
91 information about e.g. the mux function.
93 The following generic properties as defined in pinctrl-bindings.txt are valid
94 to specify in a pin configuration subnode:
98 Value type: <string-array>
99 Definition: List of gpio pins affected by the properties specified in
100 this subnode. Valid pins are:
101 gpio1-gpio4 for pm8005
102 gpio1-gpio6 for pm8018
103 gpio1-gpio12 for pm8038
104 gpio1-gpio40 for pm8058
105 gpio1-gpio4 for pm8916
106 gpio1-gpio38 for pm8917
107 gpio1-gpio44 for pm8921
108 gpio1-gpio36 for pm8941
109 gpio1-gpio8 for pm8950 (hole on gpio3)
110 gpio1-gpio22 for pm8994
111 gpio1-gpio26 for pm8998
112 gpio1-gpio22 for pma8084
113 gpio1-gpio2 for pmi8950
114 gpio1-gpio10 for pmi8994
115 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
116 gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
118 gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
119 gpio1-gpio12 for pm8150l (hole on gpio7)
120 gpio1-gpio10 for pm8350
121 gpio1-gpio8 for pm8350b
122 gpio1-gpio9 for pm8350c
123 gpio1-gpio4 for pmk8350
124 gpio1-gpio10 for pm7325
125 gpio1-gpio4 for pmr735a
126 gpio1-gpio4 for pmr735b
127 gpio1-gpio10 for pm6150
128 gpio1-gpio12 for pm6150l
129 gpio1-gpio2 for pm8008
130 gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10
136 Definition: Specify the alternative function to be configured for the
137 specified pins. Valid values are:
146 And following values are supported by LV/MV GPIO subtypes:
153 Definition: The specified pins should be configured as no pull.
158 Definition: The specified pins should be configured as pull down.
163 Definition: The specified pins should be configured as pull up.
165 - qcom,pull-up-strength:
168 Definition: Specifies the strength to use for pull up, if selected.
169 Valid values are; as defined in
170 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
171 1: 30uA (PMIC_GPIO_PULL_UP_30)
172 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
173 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
174 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
175 If this property is omitted 30uA strength will be used if
178 - bias-high-impedance:
181 Definition: The specified pins will put in high-Z mode and disabled.
186 Definition: The specified pins are put in input mode.
191 Definition: The specified pins are configured in output mode, driven
197 Definition: The specified pins are configured in output mode, driven
203 Definition: Selects the power source for the specified pins. Valid
204 power sources are defined per chip in
205 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
207 - qcom,drive-strength:
210 Definition: Selects the drive strength for the specified pins. Value
212 0: no (PMIC_GPIO_STRENGTH_NO)
213 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
214 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
215 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
216 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
221 Definition: The specified pins are configured in push-pull mode.
226 Definition: The specified pins are configured in open-drain mode.
231 Definition: The specified pins are configured in open-source mode.
236 Definition: The specified pins are configured in analog-pass-through mode.
241 Definition: Selects ATEST rail to route to GPIO when it's configured
242 in analog-pass-through mode.
243 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
248 Definition: Selects DTEST rail to route to GPIO when it's configured
250 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
254 pm8921_gpio: gpio@150 {
255 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
257 interrupts = <192 1>, <193 1>, <194 1>,
258 <195 1>, <196 1>, <197 1>,
259 <198 1>, <199 1>, <200 1>,
260 <201 1>, <202 1>, <203 1>,
261 <204 1>, <205 1>, <206 1>,
262 <207 1>, <208 1>, <209 1>,
263 <210 1>, <211 1>, <212 1>,
264 <213 1>, <214 1>, <215 1>,
265 <216 1>, <217 1>, <218 1>,
266 <219 1>, <220 1>, <221 1>,
267 <222 1>, <223 1>, <224 1>,
268 <225 1>, <226 1>, <227 1>,
269 <228 1>, <229 1>, <230 1>,
270 <231 1>, <232 1>, <233 1>,
276 pm8921_gpio_keys: gpio-keys {
278 pins = "gpio20", "gpio21";
284 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
285 power-source = <PM8921_GPIO_S4>;