Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas R-Car generation 3 USB 2.0 PHY
   8
   9 maintainers:
  10   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - const: renesas,usb2-phy-r8a77470 # RZ/G1C
  17
  18       - items:
  19           - enum:
  20               - renesas,usb2-phy-r7s9210  # RZ/A2
  21               - renesas,usb2-phy-r8a774a1 # RZ/G2M
  22               - renesas,usb2-phy-r8a774b1 # RZ/G2N
  23               - renesas,usb2-phy-r8a774c0 # RZ/G2E
  24               - renesas,usb2-phy-r8a774e1 # RZ/G2H
  25               - renesas,usb2-phy-r8a7795  # R-Car H3
  26               - renesas,usb2-phy-r8a7796  # R-Car M3-W
  27               - renesas,usb2-phy-r8a77961 # R-Car M3-W+
  28               - renesas,usb2-phy-r8a77965 # R-Car M3-N
  29               - renesas,usb2-phy-r8a77990 # R-Car E3
  30               - renesas,usb2-phy-r8a77995 # R-Car D3
  31           - const: renesas,rcar-gen3-usb2-phy
  32
  33   reg:
  34     maxItems: 1
  35
  36   clocks:
  37     minItems: 1
  38     maxItems: 2
  39
  40   clock-names:
  41     minItems: 1
  42     maxItems: 2
  43     items:
  44       - const: fck
  45       - const: usb_x1
  46
  47   '#phy-cells':
  48     enum: [0, 1]  # and 0 is deprecated.
  49     description: |
  50       The phandle's argument in the PHY specifier is the INT_STATUS bit of
  51       controller.
  52       - 1 = USBH_INTA (OHCI)
  53       - 2 = USBH_INTB (EHCI)
  54       - 3 = UCOM_INT (OTG and BC)
  55
  56   interrupts:
  57     maxItems: 1
  58
  59   power-domains:
  60     maxItems: 1
  61
  62   resets:
  63     minItems: 1
  64     maxItems: 2
  65     items:
  66       - description: reset of USB 2.0 host side
  67       - description: reset of USB 2.0 peripheral side
  68
  69   vbus-supply:
  70     description: |
  71       Phandle to a regulator that provides power to the VBUS. This regulator
  72       will be managed during the PHY power on/off sequence.
  73
  74   renesas,no-otg-pins:
  75     $ref: /schemas/types.yaml#/definitions/flag
  76     description: |
  77       specify when a board does not provide proper otg pins.
  78
  79   dr_mode: true
  80
  81 if:
  82   properties:
  83     compatible:
  84       contains:
  85         const: renesas,usb2-phy-r7s9210
  86 then:
  87   required:
  88     - clock-names
  89
  90 required:
  91   - compatible
  92   - reg
  93   - clocks
  94   - '#phy-cells'
  95
  96 additionalProperties: false
  97
  98 examples:
  99   - |
 100     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
 101     #include <dt-bindings/interrupt-controller/arm-gic.h>
 102     #include <dt-bindings/power/r8a7795-sysc.h>
 103
 104     usb-phy@ee080200 {
 105         compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
 106         reg = <0xee080200 0x700>;
 107         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 108         clocks = <&cpg CPG_MOD 703>;
 109         #phy-cells = <1>;
 110     };
 111
 112     usb-phy@ee0a0200 {
 113         compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
 114         reg = <0xee0a0200 0x700>;
 115         clocks = <&cpg CPG_MOD 702>;
 116         #phy-cells = <1>;
 117     };