1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP PHY controller
11 - Vinod Koul <vkoul@kernel.org>
14 QMP phy controller supports physical layer functionality for a number of
15 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
20 - qcom,ipq6018-qmp-pcie-phy
21 - qcom,ipq6018-qmp-usb3-phy
22 - qcom,ipq8074-qmp-pcie-phy
23 - qcom,ipq8074-qmp-usb3-phy
24 - qcom,msm8996-qmp-pcie-phy
25 - qcom,msm8996-qmp-ufs-phy
26 - qcom,msm8996-qmp-usb3-phy
27 - qcom,msm8998-qmp-pcie-phy
28 - qcom,msm8998-qmp-ufs-phy
29 - qcom,msm8998-qmp-usb3-phy
30 - qcom,qcm2290-qmp-usb3-phy
31 - qcom,sc7180-qmp-usb3-phy
32 - qcom,sc8180x-qmp-pcie-phy
33 - qcom,sc8180x-qmp-ufs-phy
34 - qcom,sc8180x-qmp-usb3-phy
35 - qcom,sdm845-qhp-pcie-phy
36 - qcom,sdm845-qmp-pcie-phy
37 - qcom,sdm845-qmp-ufs-phy
38 - qcom,sdm845-qmp-usb3-phy
39 - qcom,sdm845-qmp-usb3-uni-phy
40 - qcom,sm6115-qmp-ufs-phy
41 - qcom,sm8150-qmp-ufs-phy
42 - qcom,sm8150-qmp-usb3-phy
43 - qcom,sm8150-qmp-usb3-uni-phy
44 - qcom,sm8250-qmp-ufs-phy
45 - qcom,sm8250-qmp-gen3x1-pcie-phy
46 - qcom,sm8250-qmp-gen3x2-pcie-phy
47 - qcom,sm8250-qmp-modem-pcie-phy
48 - qcom,sm8250-qmp-usb3-phy
49 - qcom,sm8250-qmp-usb3-uni-phy
50 - qcom,sm8350-qmp-ufs-phy
51 - qcom,sm8350-qmp-usb3-phy
52 - qcom,sm8350-qmp-usb3-uni-phy
53 - qcom,sm8450-qmp-gen3x1-pcie-phy
54 - qcom,sm8450-qmp-gen4x2-pcie-phy
55 - qcom,sm8450-qmp-ufs-phy
56 - qcom,sm8450-qmp-usb3-phy
57 - qcom,sdx55-qmp-pcie-phy
58 - qcom,sdx55-qmp-usb3-uni-phy
63 - description: Address and length of PHY's common serdes block.
64 - description: Address and length of PHY's DP_COM control block.
95 Phandle to a regulator supply to PHY core block.
99 Phandle to 1.8V regulator supply to PHY refclk pll block.
103 Phandle to a regulator supply to any specific refclk pll block.
110 Each device node of QMP phy is required to have as many child nodes as
111 the number of lanes the PHY has.
125 additionalProperties: false
133 - qcom,sdm845-qmp-usb3-uni-phy
138 - description: Phy aux clock.
139 - description: Phy config clock.
140 - description: 19.2 MHz ref clk.
141 - description: Phy common block aux clock.
150 - description: reset of phy block.
151 - description: phy common block reset.
164 - qcom,sdx55-qmp-usb3-uni-phy
169 - description: Phy aux clock.
170 - description: Phy config clock.
171 - description: 19.2 MHz ref clk.
179 - description: reset of phy block.
180 - description: phy common block reset.
193 - qcom,msm8996-qmp-pcie-phy
198 - description: Phy aux clock.
199 - description: Phy config clock.
200 - description: 19.2 MHz ref clk.
208 - description: reset of phy block.
209 - description: phy common block reset.
210 - description: phy's ahb cfg block reset.
224 - qcom,ipq8074-qmp-usb3-phy
225 - qcom,msm8996-qmp-usb3-phy
226 - qcom,msm8998-qmp-pcie-phy
227 - qcom,msm8998-qmp-usb3-phy
232 - description: Phy aux clock.
233 - description: Phy config clock.
234 - description: 19.2 MHz ref clk.
242 - description: reset of phy block.
243 - description: phy common block reset.
256 - qcom,msm8996-qmp-ufs-phy
261 - description: 19.2 MHz ref clk.
267 - description: PHY reset in the UFS controller.
279 - qcom,msm8998-qmp-ufs-phy
280 - qcom,sdm845-qmp-ufs-phy
281 - qcom,sm8150-qmp-ufs-phy
282 - qcom,sm8250-qmp-ufs-phy
287 - description: 19.2 MHz ref clk.
288 - description: Phy reference aux clock.
295 - description: PHY reset in the UFS controller.
307 - qcom,ipq6018-qmp-pcie-phy
308 - qcom,ipq8074-qmp-pcie-phy
313 - description: Phy aux clock.
314 - description: Phy config clock.
321 - description: reset of phy block.
322 - description: phy common block reset.
332 - qcom,sc8180x-qmp-pcie-phy
333 - qcom,sdm845-qhp-pcie-phy
334 - qcom,sdm845-qmp-pcie-phy
335 - qcom,sdx55-qmp-pcie-phy
336 - qcom,sm8250-qmp-gen3x1-pcie-phy
337 - qcom,sm8250-qmp-gen3x2-pcie-phy
338 - qcom,sm8250-qmp-modem-pcie-phy
339 - qcom,sm8450-qmp-gen3x1-pcie-phy
340 - qcom,sm8450-qmp-gen4x2-pcie-phy
345 - description: Phy aux clock.
346 - description: Phy config clock.
347 - description: 19.2 MHz ref clk.
348 - description: Phy refgen clk.
357 - description: reset of phy block.
369 - qcom,sm8150-qmp-usb3-phy
370 - qcom,sm8150-qmp-usb3-uni-phy
371 - qcom,sm8250-qmp-usb3-uni-phy
372 - qcom,sm8350-qmp-usb3-uni-phy
377 - description: Phy aux clock.
378 - description: 19.2 MHz ref clk source.
379 - description: 19.2 MHz ref clk.
380 - description: Phy common block aux clock.
389 - description: reset of phy block.
390 - description: phy common block reset.
403 - qcom,sm8250-qmp-usb3-phy
404 - qcom,sm8350-qmp-usb3-phy
409 - description: Phy aux clock.
410 - description: 19.2 MHz ref clk.
411 - description: Phy common block aux clock.
419 - description: reset of phy block.
420 - description: phy common block reset.
433 - qcom,qcm2290-qmp-usb3-phy
438 - description: Phy config clock.
439 - description: 19.2 MHz ref clk.
440 - description: Phy common block aux clock.
448 - description: phy_phy reset.
449 - description: reset of phy block.
460 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
461 usb_2_qmpphy: phy-wrapper@88eb000 {
462 compatible = "qcom,sdm845-qmp-usb3-uni-phy";
463 reg = <0x088eb000 0x18c>;
465 #address-cells = <1>;
467 ranges = <0x0 0x088eb000 0x2000>;
469 clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
470 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
471 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
472 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
473 clock-names = "aux", "cfg_ahb", "ref", "com_aux";
475 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
476 <&gcc GCC_USB3_PHY_SEC_BCR>;
477 reset-names = "phy", "common";
479 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
480 vdda-pll-supply = <&vdda_usb2_ss_core>;
482 usb_2_ssphy: phy@200 {
489 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
490 clock-names = "pipe0";
491 clock-output-names = "usb3_uni_phy_pipe_clk_src";