1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek PCIe PHY
10 - Jianjun Wang <jianjun.wang@mediatek.com>
13 The PCIe PHY supports physical layer functionality for PCIe Gen3 port.
17 const: mediatek,mt8195-pcie-phy
32 Phandles to nvmem cell that contains the efuse data, if unspecified,
33 default value is used.
54 additionalProperties: false
59 compatible = "mediatek,mt8195-pcie-phy";
61 reg = <0x11e80000 0x10000>;
63 nvmem-cells = <&pciephy_glb_intr>,
64 <&pciephy_tx_ln0_pmos>,
65 <&pciephy_tx_ln0_nmos>,
67 <&pciephy_tx_ln1_pmos>,
68 <&pciephy_tx_ln1_nmos>,
70 nvmem-cell-names = "glb_intr", "tx_ln0_pmos",
71 "tx_ln0_nmos", "rx_ln0",
72 "tx_ln1_pmos", "tx_ln1_nmos",
74 power-domains = <&spm 2>;