1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner V3s USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
18 const: allwinner,sun8i-v3s-usb-phy
22 - description: PHY Control registers
23 - description: PHY PMU0 registers
32 description: USB OTG PHY bus clock
39 description: USB OTG reset
46 description: GPIO to the USB OTG ID pin
50 description: GPIO to the USB OTG VBUS detect pin
52 usb0_vbus_power-supply:
53 description: Power supply to detect the USB OTG VBUS
56 description: Regulator controlling USB OTG VBUS
68 additionalProperties: false
72 #include <dt-bindings/gpio/gpio.h>
73 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
74 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
78 compatible = "allwinner,sun8i-v3s-usb-phy";
79 reg = <0x01c19400 0x2c>,
81 reg-names = "phy_ctrl",
83 clocks = <&ccu CLK_USB_PHY0>;
84 clock-names = "usb0_phy";
85 resets = <&ccu RST_USB_PHY0>;
86 reset-names = "usb0_reset";
87 usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;