1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright 2020 Arm Ltd.
5 $id: http://devicetree.org/schemas/perf/arm,cmn.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Arm CMN (Coherent Mesh Network) Performance Monitors
11 - Robin Murphy <robin.murphy@arm.com>
19 - description: Physical address of the base (PERIPHBASE) and
20 size (up to 64MB) of the configuration address space.
26 - description: Overflow interrupt for DTC0
27 - description: Overflow interrupt for DTC1
28 - description: Overflow interrupt for DTC2
29 - description: Overflow interrupt for DTC3
30 description: One interrupt for each DTC domain implemented must
31 be specified, in order. DTC0 is always present.
34 $ref: /schemas/types.yaml#/definitions/uint32
35 description: Offset from PERIPHBASE of the configuration
36 discovery node (see TRM definition of ROOTNODEBASE).
44 additionalProperties: false
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/interrupt-controller/irq.h>
51 compatible = "arm,cmn-600";
52 reg = <0x50000000 0x4000000>;
53 /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
54 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
55 arm,root-node = <0x104000>;