Documentation/devicetree/bindings/pci/versatile.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/versatile.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: ARM Versatile Platform Baseboard PCI interface
   8
   9 maintainers:
  10   - Rob Herring <robh@kernel.org>
  11
  12 description: |+
  13   PCI host controller found on the ARM Versatile PB board's FPGA.
  14
  15 allOf:
  16   - $ref: /schemas/pci/pci-bus.yaml#
  17
  18 properties:
  19   compatible:
  20     const: arm,versatile-pci
  21
  22   reg:
  23     items:
  24       - description: Versatile-specific registers
  25       - description: Self Config space
  26       - description: Config space
  27
  28   ranges:
  29     maxItems: 3
  30
  31   "#interrupt-cells": true
  32
  33   interrupt-map:
  34     maxItems: 16
  35
  36   interrupt-map-mask:
  37     items:
  38       - const: 0x1800
  39       - const: 0
  40       - const: 0
  41       - const: 7
  42
  43 required:
  44   - compatible
  45   - reg
  46   - ranges
  47   - "#interrupt-cells"
  48   - interrupt-map
  49   - interrupt-map-mask
  50
  51 unevaluatedProperties: false
  52
  53 examples:
  54   - |
  55     pci@10001000 {
  56       compatible = "arm,versatile-pci";
  57       device_type = "pci";
  58       reg = <0x10001000 0x1000>,
  59             <0x41000000 0x10000>,
  60             <0x42000000 0x100000>;
  61       bus-range = <0 0xff>;
  62       #address-cells = <3>;
  63       #size-cells = <2>;
  64       #interrupt-cells = <1>;
  65
  66       ranges =
  67           <0x01000000 0 0x00000000 0x43000000 0 0x00010000>,  /* downstream I/O */
  68           <0x02000000 0 0x50000000 0x50000000 0 0x10000000>,  /* non-prefetchable memory */
  69           <0x42000000 0 0x60000000 0x60000000 0 0x10000000>;  /* prefetchable memory */
  70
  71       interrupt-map-mask = <0x1800 0 0 7>;
  72       interrupt-map = <0x1800 0 0 1 &sic 28>,
  73           <0x1800 0 0 2 &sic 29>,
  74           <0x1800 0 0 3 &sic 30>,
  75           <0x1800 0 0 4 &sic 27>,
  76
  77           <0x1000 0 0 1 &sic 27>,
  78           <0x1000 0 0 2 &sic 28>,
  79           <0x1000 0 0 3 &sic 29>,
  80           <0x1000 0 0 4 &sic 30>,
  81
  82           <0x0800 0 0 1 &sic 30>,
  83           <0x0800 0 0 2 &sic 27>,
  84           <0x0800 0 0 3 &sic 28>,
  85           <0x0800 0 0 4 &sic 29>,
  86
  87           <0x0000 0 0 1 &sic 29>,
  88           <0x0000 0 0 2 &sic 30>,
  89           <0x0000 0 0 3 &sic 27>,
  90           <0x0000 0 0 4 &sic 28>;
  91     };
  92
  93
  94 ...