Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Socionext UniPhier PCIe endpoint controller
   8
   9 description: |
  10   UniPhier PCIe endpoint controller is based on the Synopsys DesignWare
  11   PCI core. It shares common features with the PCIe DesignWare core and
  12   inherits common properties defined in
  13   Documentation/devicetree/bindings/pci/designware-pcie.txt.
  14
  15 maintainers:
  16   - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
  17
  18 allOf:
  19   - $ref: "pci-ep.yaml#"
  20
  21 properties:
  22   compatible:
  23     const: socionext,uniphier-pro5-pcie-ep
  24
  25   reg:
  26     maxItems: 4
  27
  28   reg-names:
  29     items:
  30       - const: dbi
  31       - const: dbi2
  32       - const: link
  33       - const: addr_space
  34
  35   clocks:
  36     maxItems: 2
  37
  38   clock-names:
  39     items:
  40       - const: gio
  41       - const: link
  42
  43   resets:
  44     maxItems: 2
  45
  46   reset-names:
  47     items:
  48       - const: gio
  49       - const: link
  50
  51   num-ib-windows:
  52     const: 16
  53
  54   num-ob-windows:
  55     const: 16
  56
  57   num-lanes: true
  58
  59   phys:
  60     maxItems: 1
  61
  62   phy-names:
  63     const: pcie-phy
  64
  65 required:
  66   - compatible
  67   - reg
  68   - reg-names
  69   - clocks
  70   - clock-names
  71   - resets
  72   - reset-names
  73
  74 additionalProperties: false
  75
  76 examples:
  77   - |
  78     pcie_ep: pcie-ep@66000000 {
  79         compatible = "socionext,uniphier-pro5-pcie-ep";
  80         reg-names = "dbi", "dbi2", "link", "addr_space";
  81         reg = <0x66000000 0x1000>, <0x66001000 0x1000>,
  82               <0x66010000 0x10000>, <0x67000000 0x400000>;
  83         clock-names = "gio", "link";
  84         clocks = <&sys_clk 12>, <&sys_clk 24>;
  85         reset-names = "gio", "link";
  86         resets = <&sys_rst 12>, <&sys_rst 24>;
  87         num-ib-windows = <16>;
  88         num-ob-windows = <16>;
  89         num-lanes = <4>;
  90         phy-names = "pcie-phy";
  91         phys = <&pcie_phy>;
  92     };