1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Renesas Electronics Corp.
5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Gen4 PCIe Endpoint
11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
14 - $ref: snps,dw-pcie-ep.yaml#
19 - const: renesas,r8a779f0-pcie-ep # R-Car S4-8
20 - const: renesas,rcar-gen4-pcie-ep # R-Car Gen4
83 unevaluatedProperties: false
87 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
88 #include <dt-bindings/interrupt-controller/arm-gic.h>
89 #include <dt-bindings/power/r8a779f0-sysc.h>
95 pcie0_ep: pcie-ep@e65d0000 {
96 compatible = "renesas,r8a779f0-pcie-ep", "renesas,rcar-gen4-pcie-ep";
97 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>,
98 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
99 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
100 <0 0xfe000000 0 0x400000>;
101 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";
102 interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
103 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
104 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
105 interrupt-names = "dma", "sft_ce", "app";
106 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
107 clock-names = "core", "ref";
108 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
111 max-link-speed = <4>;
113 max-functions = /bits/ 8 <2>;