Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-host.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Cadence PCIe host controller
   8
   9 maintainers:
  10   - Tom Joseph <tjoseph@cadence.com>
  11
  12 allOf:
  13   - $ref: cdns-pcie-host.yaml#
  14
  15 properties:
  16   compatible:
  17     const: cdns,cdns-pcie-host
  18
  19   reg:
  20     maxItems: 2
  21
  22   reg-names:
  23     items:
  24       - const: reg
  25       - const: cfg
  26
  27 required:
  28   - reg
  29   - reg-names
  30
  31 unevaluatedProperties: false
  32
  33 examples:
  34   - |
  35     bus {
  36         #address-cells = <2>;
  37         #size-cells = <2>;
  38
  39         pcie@fb000000 {
  40             compatible = "cdns,cdns-pcie-host";
  41             device_type = "pci";
  42             #address-cells = <3>;
  43             #size-cells = <2>;
  44             bus-range = <0x0 0xff>;
  45             linux,pci-domain = <0>;
  46             vendor-id = <0x17cd>;
  47             device-id = <0x0200>;
  48
  49             reg = <0x0 0xfb000000  0x0 0x01000000>,
  50                   <0x0 0x41000000  0x0 0x00001000>;
  51             reg-names = "reg", "cfg";
  52
  53             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
  54                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
  55             dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
  56
  57             #interrupt-cells = <0x1>;
  58
  59             interrupt-map = <0x0 0x0 0x0  0x1  &gic  0x0 0x0 0x0 14 0x1>,
  60                  <0x0 0x0 0x0  0x2  &gic  0x0 0x0 0x0 15 0x1>,
  61                  <0x0 0x0 0x0  0x3  &gic  0x0 0x0 0x0 16 0x1>,
  62                  <0x0 0x0 0x0  0x4  &gic  0x0 0x0 0x0 17 0x1>;
  63
  64             interrupt-map-mask = <0x0 0x0 0x0  0x7>;
  65
  66             msi-parent = <&its_pci>;
  67
  68             phys = <&pcie_phy0>;
  69             phy-names = "pcie-phy";
  70         };
  71     };
  72 ...