1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Brcmstb PCIe Host Controller Device Tree Bindings
10 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7278-pcie # Broadcom 7278 Arm
20 - brcm,bcm7216-pcie # Broadcom 7216 Arm
21 - brcm,bcm7445-pcie # Broadcom 7445 Arm
22 - brcm,bcm7425-pcie # Broadcom 7425 MIPs
23 - brcm,bcm7435-pcie # Broadcom 7435 MIPs
31 - description: PCIe host controller
32 - description: builtin MSI controller
56 description: Identifies the node as an MSI controller.
59 description: MSI controller the device is capable of using.
62 description: Indicates usage of spread-spectrum clocking.
68 description: u64 giving the 64bit PCIe memory
69 viewport size of a memory controller. There may be up to
70 three controllers, and each size must be a power of two
71 with a size greater or equal to the amount of memory the
72 controller supports. Note that each memory controller
73 may have two component regions -- base and extended -- so
74 this information cannot be deduced from the dma-ranges.
75 $ref: /schemas/types.yaml#/definitions/uint64-array
93 - $ref: /schemas/pci/pci-bus.yaml#
94 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
99 const: brcm,bcm4908-pcie
104 - description: reset controller handling the PERST# signal
117 const: brcm,bcm7216-pcie
122 - description: phandle pointing to the RESCAL reset controller
132 unevaluatedProperties: false
136 #include <dt-bindings/interrupt-controller/irq.h>
137 #include <dt-bindings/interrupt-controller/arm-gic.h>
140 #address-cells = <2>;
142 pcie0: pcie@7d500000 {
143 compatible = "brcm,bcm2711-pcie";
144 reg = <0x0 0x7d500000 0x9310>;
146 #address-cells = <3>;
148 #interrupt-cells = <1>;
149 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
151 interrupt-names = "pcie", "msi";
152 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
153 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
154 msi-parent = <&pcie0>;
156 ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
157 dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
158 <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
160 brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;