Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Brcmstb PCIe Host Controller
   8
   9 maintainers:
  10   - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
  11
  12 properties:
  13   compatible:
  14     items:
  15       - enum:
  16           - brcm,bcm2711-pcie # The Raspberry Pi 4
  17           - brcm,bcm4908-pcie
  18           - brcm,bcm7211-pcie # Broadcom STB version of RPi4
  19           - brcm,bcm7278-pcie # Broadcom 7278 Arm
  20           - brcm,bcm7216-pcie # Broadcom 7216 Arm
  21           - brcm,bcm7445-pcie # Broadcom 7445 Arm
  22           - brcm,bcm7425-pcie # Broadcom 7425 MIPs
  23           - brcm,bcm7435-pcie # Broadcom 7435 MIPs
  24
  25   reg:
  26     maxItems: 1
  27
  28   interrupts:
  29     minItems: 1
  30     items:
  31       - description: PCIe host controller
  32       - description: builtin MSI controller
  33
  34   interrupt-names:
  35     minItems: 1
  36     items:
  37       - const: pcie
  38       - const: msi
  39
  40   ranges:
  41     minItems: 1
  42     maxItems: 4
  43
  44   dma-ranges:
  45     minItems: 1
  46     maxItems: 6
  47
  48   clocks:
  49     maxItems: 1
  50
  51   clock-names:
  52     items:
  53       - const: sw_pcie
  54
  55   msi-controller:
  56     description: Identifies the node as an MSI controller.
  57
  58   msi-parent:
  59     description: MSI controller the device is capable of using.
  60
  61   brcm,enable-ssc:
  62     description: Indicates usage of spread-spectrum clocking.
  63     type: boolean
  64
  65   aspm-no-l0s: true
  66
  67   brcm,scb-sizes:
  68     description: u64 giving the 64bit PCIe memory
  69       viewport size of a memory controller.  There may be up to
  70       three controllers, and each size must be a power of two
  71       with a size greater or equal to the amount of memory the
  72       controller supports.  Note that each memory controller
  73       may have two component regions -- base and extended -- so
  74       this information cannot be deduced from the dma-ranges.
  75     $ref: /schemas/types.yaml#/definitions/uint64-array
  76     items:
  77       minItems: 1
  78       maxItems: 3
  79
  80 required:
  81   - compatible
  82   - reg
  83   - ranges
  84   - dma-ranges
  85   - "#interrupt-cells"
  86   - interrupts
  87   - interrupt-names
  88   - interrupt-map-mask
  89   - interrupt-map
  90   - msi-controller
  91
  92 allOf:
  93   - $ref: /schemas/pci/pci-bus.yaml#
  94   - $ref: /schemas/interrupt-controller/msi-controller.yaml#
  95   - if:
  96       properties:
  97         compatible:
  98           contains:
  99             const: brcm,bcm4908-pcie
 100     then:
 101       properties:
 102         resets:
 103           items:
 104             - description: reset controller handling the PERST# signal
 105
 106         reset-names:
 107           items:
 108             - const: perst
 109
 110       required:
 111         - resets
 112         - reset-names
 113   - if:
 114       properties:
 115         compatible:
 116           contains:
 117             const: brcm,bcm7216-pcie
 118     then:
 119       properties:
 120         resets:
 121           items:
 122             - description: phandle pointing to the RESCAL reset controller
 123
 124         reset-names:
 125           items:
 126             - const: rescal
 127
 128       required:
 129         - resets
 130         - reset-names
 131
 132 unevaluatedProperties: false
 133
 134 examples:
 135   - |
 136     #include <dt-bindings/interrupt-controller/irq.h>
 137     #include <dt-bindings/interrupt-controller/arm-gic.h>
 138
 139     scb {
 140             #address-cells = <2>;
 141             #size-cells = <1>;
 142             pcie0: pcie@7d500000 {
 143                     compatible = "brcm,bcm2711-pcie";
 144                     reg = <0x0 0x7d500000 0x9310>;
 145                     device_type = "pci";
 146                     #address-cells = <3>;
 147                     #size-cells = <2>;
 148                     #interrupt-cells = <1>;
 149                     interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
 150                                  <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 151                     interrupt-names = "pcie", "msi";
 152                     interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 153                     interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
 154                                      0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH
 155                                      0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH
 156                                      0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 157
 158                     msi-parent = <&pcie0>;
 159                     msi-controller;
 160                     ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
 161                     dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
 162                                  <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
 163                     brcm,enable-ssc;
 164                     brcm,scb-sizes =  <0x0000000080000000 0x0000000080000000>;
 165
 166                     /* PCIe bridge, Root Port */
 167                     pci@0,0 {
 168                             #address-cells = <3>;
 169                             #size-cells = <2>;
 170                             reg = <0x0 0x0 0x0 0x0 0x0>;
 171                             compatible = "pciclass,0604";
 172                             device_type = "pci";
 173                             vpcie3v3-supply = <&vreg7>;
 174                             ranges;
 175
 176                             /* PCIe endpoint */
 177                             pci-ep@0,0 {
 178                                     assigned-addresses =
 179                                         <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>;
 180                                     reg = <0x0 0x0 0x0 0x0 0x0>;
 181                                     compatible = "pci14e4,1688";
 182                             };
 183                     };
 184             };
 185     };