Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies Inc, QFPROM Efuse bindings
   8
   9 maintainers:
  10   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
  11
  12 allOf:
  13   - $ref: "nvmem.yaml#"
  14
  15 properties:
  16   compatible:
  17     const: qcom,qfprom
  18
  19   reg:
  20     # If the QFPROM is read-only OS image then only the corrected region
  21     # needs to be provided.  If the QFPROM is writable then all 4 regions
  22     # must be provided.
  23     oneOf:
  24       - items:
  25           - description: The corrected region.
  26       - items:
  27           - description: The corrected region.
  28           - description: The raw region.
  29           - description: The config region.
  30           - description: The security control region.
  31
  32   # Clock must be provided if QFPROM is writable from the OS image.
  33   clocks:
  34     maxItems: 1
  35   clock-names:
  36     const: core
  37
  38   # Supply reference must be provided if QFPROM is writable from the OS image.
  39   vcc-supply:
  40     description: Our power supply.
  41
  42   # Needed if any child nodes are present.
  43   "#address-cells":
  44     const: 1
  45   "#size-cells":
  46     const: 1
  47
  48 required:
  49   - compatible
  50   - reg
  51
  52 unevaluatedProperties: false
  53
  54 examples:
  55   - |
  56     #include <dt-bindings/clock/qcom,gcc-sc7180.h>
  57
  58     soc {
  59       #address-cells = <2>;
  60       #size-cells = <2>;
  61
  62       efuse@784000 {
  63         compatible = "qcom,qfprom";
  64         reg = <0 0x00784000 0 0x8ff>,
  65               <0 0x00780000 0 0x7a0>,
  66               <0 0x00782000 0 0x100>,
  67               <0 0x00786000 0 0x1fff>;
  68         clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
  69         clock-names = "core";
  70         #address-cells = <1>;
  71         #size-cells = <1>;
  72
  73         vcc-supply = <&vreg_l11a_1p8>;
  74
  75         hstx-trim-primary@25b {
  76           reg = <0x25b 0x1>;
  77           bits = <1 3>;
  78         };
  79       };
  80     };
  81
  82   - |
  83     soc {
  84       #address-cells = <2>;
  85       #size-cells = <2>;
  86
  87       efuse@784000 {
  88         compatible = "qcom,qfprom";
  89         reg = <0 0x00784000 0 0x8ff>;
  90         #address-cells = <1>;
  91         #size-cells = <1>;
  92
  93         hstx-trim-primary@1eb {
  94           reg = <0x1eb 0x1>;
  95           bits = <1 4>;
  96         };
  97       };
  98     };