1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
42 # We need to include all the compatibles from schemas that will
43 # include that schemas, otherwise compatible won't validate for
48 - allwinner,sun7i-a20-gmac
49 - allwinner,sun8i-a83t-emac
50 - allwinner,sun8i-h3-emac
51 - allwinner,sun8i-r40-emac
52 - allwinner,sun8i-v3s-emac
53 - allwinner,sun50i-a64-emac
56 - amlogic,meson6-dwmac
57 - amlogic,meson8b-dwmac
58 - amlogic,meson8m2-dwmac
59 - amlogic,meson-gxbb-dwmac
60 - amlogic,meson-axg-dwmac
69 - rockchip,rk3128-gmac
70 - rockchip,rk3228-gmac
71 - rockchip,rk3288-gmac
72 - rockchip,rk3328-gmac
73 - rockchip,rk3366-gmac
74 - rockchip,rk3368-gmac
75 - rockchip,rk3399-gmac
76 - rockchip,rv1108-gmac
95 - description: Combined signal for various interrupt events
96 - description: The interrupt to manage the remote wake-up packet detection
97 - description: The interrupt that occurs when Rx exits the LPI state
103 - const: eth_wake_irq
109 additionalItems: true
111 - description: GMAC main clock
112 - description: Peripheral registers interface clock
114 PTP reference clock. This clock is used for programming the
115 Timestamp Addend Register. If not passed then the system
116 clock will be used and this is fine on some platforms.
121 additionalItems: true
137 $ref: ethernet-controller.yaml#/properties/phy-connection-type
139 The property is identical to 'phy-mode', and assumes that there is mode
140 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
141 can be passive (no SW requirement), and requires that the MAC operate
142 in a different mode than the PHY in order to function.
145 $ref: /schemas/types.yaml#/definitions/phandle
147 AXI BUS Mode parameters. Phandle to a node that can contain the
149 * snps,lpi_en, enable Low Power Interface
150 * snps,xit_frm, unlock on WoL
151 * snps,wr_osr_lmt, max write outstanding req. limit
152 * snps,rd_osr_lmt, max read outstanding req. limit
153 * snps,kbbe, do not cross 1KiB boundary.
154 * snps,blen, this is a vector of supported burst length.
155 * snps,fb, fixed-burst
156 * snps,mb, mixed-burst
157 * snps,rb, rebuild INCRx Burst
160 $ref: /schemas/types.yaml#/definitions/phandle
162 Multiple RX Queues parameters. Phandle to a node that can
163 contain the following properties
164 * snps,rx-queues-to-use, number of RX queues to be used in the
166 * Choose one of these RX scheduling algorithms
167 * snps,rx-sched-sp, Strict priority
168 * snps,rx-sched-wsp, Weighted Strict priority
170 * Choose one of these modes
171 * snps,dcb-algorithm, Queue to be enabled as DCB
172 * snps,avb-algorithm, Queue to be enabled as AVB
173 * snps,map-to-dma-channel, Channel to map
174 * Specifiy specific packet routing
175 * snps,route-avcp, AV Untagged Control packets
176 * snps,route-ptp, PTP Packets
177 * snps,route-dcbcp, DCB Control Packets
178 * snps,route-up, Untagged Packets
179 * snps,route-multi-broad, Multicast & Broadcast Packets
180 * snps,priority, bitmask of the tagged frames priorities assigned to
184 $ref: /schemas/types.yaml#/definitions/phandle
186 Multiple TX Queues parameters. Phandle to a node that can
187 contain the following properties
188 * snps,tx-queues-to-use, number of TX queues to be used in the
190 * Choose one of these TX scheduling algorithms
191 * snps,tx-sched-wrr, Weighted Round Robin
192 * snps,tx-sched-wfq, Weighted Fair Queuing
193 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
194 * snps,tx-sched-sp, Strict priority
196 * snps,weight, TX queue weight (if using a DCB weight
198 * Choose one of these modes
199 * snps,dcb-algorithm, TX queue will be working in DCB
200 * snps,avb-algorithm, TX queue will be working in AVB
201 [Attention] Queue 0 is reserved for legacy traffic
202 and so no AVB is available in this queue.
203 * Configure Credit Base Shaper (if AVB Mode selected)
204 * snps,send_slope, enable Low Power Interface
205 * snps,idle_slope, unlock on WoL
206 * snps,high_credit, max write outstanding req. limit
207 * snps,low_credit, max read outstanding req. limit
208 * snps,priority, bitmask of the priorities assigned to the queue.
209 When a PFC frame is received with priorities matching the bitmask,
210 the queue is blocked from transmitting for the pause time specified
219 snps,reset-active-low:
221 $ref: /schemas/types.yaml#/definitions/flag
223 Indicates that the PHY Reset is active low
225 snps,reset-delays-us:
228 Triplet of delays. The 1st cell is reset pre-delay in micro
229 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
230 cell is reset post-delay in micro seconds.
235 $ref: /schemas/types.yaml#/definitions/flag
237 Use Address-Aligned Beats
240 $ref: /schemas/types.yaml#/definitions/flag
242 Program the DMA to use the fixed burst mode
245 $ref: /schemas/types.yaml#/definitions/flag
247 Program the DMA to use the mixed burst mode
249 snps,force_thresh_dma_mode:
250 $ref: /schemas/types.yaml#/definitions/flag
252 Force DMA to use the threshold mode for both tx and rx
254 snps,force_sf_dma_mode:
255 $ref: /schemas/types.yaml#/definitions/flag
257 Force DMA to use the Store and Forward mode for both tx and
258 rx. This flag is ignored if force_thresh_dma_mode is set.
260 snps,en-tx-lpi-clockgating:
261 $ref: /schemas/types.yaml#/definitions/flag
263 Enable gating of the MAC TX clock during TX low-power mode
265 snps,multicast-filter-bins:
266 $ref: /schemas/types.yaml#/definitions/uint32
268 Number of multicast filter hash bins supported by this device
271 snps,perfect-filter-entries:
272 $ref: /schemas/types.yaml#/definitions/uint32
274 Number of perfect filter entries supported by this device
278 $ref: /schemas/types.yaml#/definitions/uint32
280 Port selection speed that can be passed to the core when PCS
281 is supported. For example, this is used in case of SGMII and
287 Creates and registers an MDIO bus.
291 const: snps,dwmac-mdio
304 snps,reset-active-low: ["snps,reset-gpio"]
305 snps,reset-delay-us: ["snps,reset-gpio"]
308 - $ref: "ethernet-controller.yaml#"
314 - allwinner,sun7i-a20-gmac
315 - allwinner,sun8i-a83t-emac
316 - allwinner,sun8i-h3-emac
317 - allwinner,sun8i-r40-emac
318 - allwinner,sun8i-v3s-emac
319 - allwinner,sun50i-a64-emac
333 Programmable Burst Length (tx and rx)
334 $ref: /schemas/types.yaml#/definitions/uint32
339 Tx Programmable Burst Length. If set, DMA tx will use this
340 value rather than snps,pbl.
341 $ref: /schemas/types.yaml#/definitions/uint32
346 Rx Programmable Burst Length. If set, DMA rx will use this
347 value rather than snps,pbl.
348 $ref: /schemas/types.yaml#/definitions/uint32
352 $ref: /schemas/types.yaml#/definitions/flag
354 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
355 rev < 3.50, don\'t multiply the values by 4.
362 - allwinner,sun7i-a20-gmac
363 - allwinner,sun8i-a83t-emac
364 - allwinner,sun8i-h3-emac
365 - allwinner,sun8i-r40-emac
366 - allwinner,sun8i-v3s-emac
367 - allwinner,sun50i-a64-emac
368 - loongson,ls2k-dwmac
369 - loongson,ls7a-dwmac
385 $ref: /schemas/types.yaml#/definitions/flag
387 Enables the TSO feature otherwise it will be managed by
388 MAC HW capability register.
390 additionalProperties: true
394 stmmac_axi_setup: stmmac-axi-config {
395 snps,wr_osr_lmt = <0xf>;
396 snps,rd_osr_lmt = <0xf>;
397 snps,blen = <256 128 64 32 0 0 0>;
400 mtl_rx_setup: rx-queues-config {
401 snps,rx-queues-to-use = <1>;
405 snps,map-to-dma-channel = <0x0>;
406 snps,priority = <0x0>;
410 mtl_tx_setup: tx-queues-config {
411 snps,tx-queues-to-use = <2>;
414 snps,weight = <0x10>;
416 snps,priority = <0x0>;
421 snps,send_slope = <0x1000>;
422 snps,idle_slope = <0x1000>;
423 snps,high_credit = <0x3E800>;
424 snps,low_credit = <0xFFC18000>;
425 snps,priority = <0x1>;
429 gmac0: ethernet@e0800000 {
430 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
431 reg = <0xe0800000 0x8000>;
432 interrupt-parent = <&vic1>;
433 interrupts = <24 23 22>;
434 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
435 mac-address = [000000000000]; /* Filled in by U-Boot */
436 max-frame-size = <3800>;
438 snps,multicast-filter-bins = <256>;
439 snps,perfect-filter-entries = <128>;
440 rx-fifo-depth = <16384>;
441 tx-fifo-depth = <16384>;
443 clock-names = "stmmaceth";
444 snps,axi-config = <&stmmac_axi_setup>;
445 snps,mtl-rx-config = <&mtl_rx_setup>;
446 snps,mtl-tx-config = <&mtl_tx_setup>;
448 #address-cells = <1>;
450 compatible = "snps,dwmac-mdio";
451 phy1: ethernet-phy@0 {
457 # FIXME: We should set it, but it would report all the generic
458 # properties as additional properties.
459 # additionalProperties: false