1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
42 # We need to include all the compatibles from schemas that will
43 # include that schemas, otherwise compatible won't validate for
48 - allwinner,sun7i-a20-gmac
49 - allwinner,sun8i-a83t-emac
50 - allwinner,sun8i-h3-emac
51 - allwinner,sun8i-r40-emac
52 - allwinner,sun8i-v3s-emac
53 - allwinner,sun50i-a64-emac
54 - amlogic,meson6-dwmac
55 - amlogic,meson8b-dwmac
56 - amlogic,meson8m2-dwmac
57 - amlogic,meson-gxbb-dwmac
58 - amlogic,meson-axg-dwmac
60 - rockchip,rk3128-gmac
61 - rockchip,rk3228-gmac
62 - rockchip,rk3288-gmac
63 - rockchip,rk3328-gmac
64 - rockchip,rk3366-gmac
65 - rockchip,rk3368-gmac
66 - rockchip,rk3399-gmac
67 - rockchip,rv1108-gmac
86 - description: Combined signal for various interrupt events
87 - description: The interrupt to manage the remote wake-up packet detection
88 - description: The interrupt that occurs when Rx exits the LPI state
100 additionalItems: true
102 - description: GMAC main clock
103 - description: Peripheral registers interface clock
105 PTP reference clock. This clock is used for programming the
106 Timestamp Addend Register. If not passed then the system
107 clock will be used and this is fine on some platforms.
112 additionalItems: true
128 $ref: ethernet-controller.yaml#/properties/phy-connection-type
130 The property is identical to 'phy-mode', and assumes that there is mode
131 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
132 can be passive (no SW requirement), and requires that the MAC operate
133 in a different mode than the PHY in order to function.
136 $ref: /schemas/types.yaml#/definitions/phandle
138 AXI BUS Mode parameters. Phandle to a node that can contain the
140 * snps,lpi_en, enable Low Power Interface
141 * snps,xit_frm, unlock on WoL
142 * snps,wr_osr_lmt, max write outstanding req. limit
143 * snps,rd_osr_lmt, max read outstanding req. limit
144 * snps,kbbe, do not cross 1KiB boundary.
145 * snps,blen, this is a vector of supported burst length.
146 * snps,fb, fixed-burst
147 * snps,mb, mixed-burst
148 * snps,rb, rebuild INCRx Burst
151 $ref: /schemas/types.yaml#/definitions/phandle
153 Multiple RX Queues parameters. Phandle to a node that can
154 contain the following properties
155 * snps,rx-queues-to-use, number of RX queues to be used in the
157 * Choose one of these RX scheduling algorithms
158 * snps,rx-sched-sp, Strict priority
159 * snps,rx-sched-wsp, Weighted Strict priority
161 * Choose one of these modes
162 * snps,dcb-algorithm, Queue to be enabled as DCB
163 * snps,avb-algorithm, Queue to be enabled as AVB
164 * snps,map-to-dma-channel, Channel to map
165 * Specifiy specific packet routing
166 * snps,route-avcp, AV Untagged Control packets
167 * snps,route-ptp, PTP Packets
168 * snps,route-dcbcp, DCB Control Packets
169 * snps,route-up, Untagged Packets
170 * snps,route-multi-broad, Multicast & Broadcast Packets
171 * snps,priority, bitmask of the tagged frames priorities assigned to
175 $ref: /schemas/types.yaml#/definitions/phandle
177 Multiple TX Queues parameters. Phandle to a node that can
178 contain the following properties
179 * snps,tx-queues-to-use, number of TX queues to be used in the
181 * Choose one of these TX scheduling algorithms
182 * snps,tx-sched-wrr, Weighted Round Robin
183 * snps,tx-sched-wfq, Weighted Fair Queuing
184 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
185 * snps,tx-sched-sp, Strict priority
187 * snps,weight, TX queue weight (if using a DCB weight
189 * Choose one of these modes
190 * snps,dcb-algorithm, TX queue will be working in DCB
191 * snps,avb-algorithm, TX queue will be working in AVB
192 [Attention] Queue 0 is reserved for legacy traffic
193 and so no AVB is available in this queue.
194 * Configure Credit Base Shaper (if AVB Mode selected)
195 * snps,send_slope, enable Low Power Interface
196 * snps,idle_slope, unlock on WoL
197 * snps,high_credit, max write outstanding req. limit
198 * snps,low_credit, max read outstanding req. limit
199 * snps,priority, bitmask of the priorities assigned to the queue.
200 When a PFC frame is received with priorities matching the bitmask,
201 the queue is blocked from transmitting for the pause time specified
210 snps,reset-active-low:
212 $ref: /schemas/types.yaml#/definitions/flag
214 Indicates that the PHY Reset is active low
216 snps,reset-delays-us:
219 Triplet of delays. The 1st cell is reset pre-delay in micro
220 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
221 cell is reset post-delay in micro seconds.
226 $ref: /schemas/types.yaml#/definitions/flag
228 Use Address-Aligned Beats
231 $ref: /schemas/types.yaml#/definitions/flag
233 Program the DMA to use the fixed burst mode
236 $ref: /schemas/types.yaml#/definitions/flag
238 Program the DMA to use the mixed burst mode
240 snps,force_thresh_dma_mode:
241 $ref: /schemas/types.yaml#/definitions/flag
243 Force DMA to use the threshold mode for both tx and rx
245 snps,force_sf_dma_mode:
246 $ref: /schemas/types.yaml#/definitions/flag
248 Force DMA to use the Store and Forward mode for both tx and
249 rx. This flag is ignored if force_thresh_dma_mode is set.
251 snps,en-tx-lpi-clockgating:
252 $ref: /schemas/types.yaml#/definitions/flag
254 Enable gating of the MAC TX clock during TX low-power mode
256 snps,multicast-filter-bins:
257 $ref: /schemas/types.yaml#/definitions/uint32
259 Number of multicast filter hash bins supported by this device
262 snps,perfect-filter-entries:
263 $ref: /schemas/types.yaml#/definitions/uint32
265 Number of perfect filter entries supported by this device
269 $ref: /schemas/types.yaml#/definitions/uint32
271 Port selection speed that can be passed to the core when PCS
272 is supported. For example, this is used in case of SGMII and
278 Creates and registers an MDIO bus.
282 const: snps,dwmac-mdio
295 snps,reset-active-low: ["snps,reset-gpio"]
296 snps,reset-delay-us: ["snps,reset-gpio"]
299 - $ref: "ethernet-controller.yaml#"
305 - allwinner,sun7i-a20-gmac
306 - allwinner,sun8i-a83t-emac
307 - allwinner,sun8i-h3-emac
308 - allwinner,sun8i-r40-emac
309 - allwinner,sun8i-v3s-emac
310 - allwinner,sun50i-a64-emac
319 Programmable Burst Length (tx and rx)
320 $ref: /schemas/types.yaml#/definitions/uint32
325 Tx Programmable Burst Length. If set, DMA tx will use this
326 value rather than snps,pbl.
327 $ref: /schemas/types.yaml#/definitions/uint32
332 Rx Programmable Burst Length. If set, DMA rx will use this
333 value rather than snps,pbl.
334 $ref: /schemas/types.yaml#/definitions/uint32
338 $ref: /schemas/types.yaml#/definitions/flag
340 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
341 rev < 3.50, don\'t multiply the values by 4.
348 - allwinner,sun7i-a20-gmac
349 - allwinner,sun8i-a83t-emac
350 - allwinner,sun8i-h3-emac
351 - allwinner,sun8i-r40-emac
352 - allwinner,sun8i-v3s-emac
353 - allwinner,sun50i-a64-emac
364 $ref: /schemas/types.yaml#/definitions/flag
366 Enables the TSO feature otherwise it will be managed by
367 MAC HW capability register.
369 additionalProperties: true
373 stmmac_axi_setup: stmmac-axi-config {
374 snps,wr_osr_lmt = <0xf>;
375 snps,rd_osr_lmt = <0xf>;
376 snps,blen = <256 128 64 32 0 0 0>;
379 mtl_rx_setup: rx-queues-config {
380 snps,rx-queues-to-use = <1>;
384 snps,map-to-dma-channel = <0x0>;
385 snps,priority = <0x0>;
389 mtl_tx_setup: tx-queues-config {
390 snps,tx-queues-to-use = <2>;
393 snps,weight = <0x10>;
395 snps,priority = <0x0>;
400 snps,send_slope = <0x1000>;
401 snps,idle_slope = <0x1000>;
402 snps,high_credit = <0x3E800>;
403 snps,low_credit = <0xFFC18000>;
404 snps,priority = <0x1>;
408 gmac0: ethernet@e0800000 {
409 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
410 reg = <0xe0800000 0x8000>;
411 interrupt-parent = <&vic1>;
412 interrupts = <24 23 22>;
413 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
414 mac-address = [000000000000]; /* Filled in by U-Boot */
415 max-frame-size = <3800>;
417 snps,multicast-filter-bins = <256>;
418 snps,perfect-filter-entries = <128>;
419 rx-fifo-depth = <16384>;
420 tx-fifo-depth = <16384>;
422 clock-names = "stmmaceth";
423 snps,axi-config = <&stmmac_axi_setup>;
424 snps,mtl-rx-config = <&mtl_rx_setup>;
425 snps,mtl-tx-config = <&mtl_tx_setup>;
427 #address-cells = <1>;
429 compatible = "snps,dwmac-mdio";
430 phy1: ethernet-phy@0 {
436 # FIXME: We should set it, but it would report all the generic
437 # properties as additional properties.
438 # additionalProperties: false