1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
42 # We need to include all the compatibles from schemas that will
43 # include that schemas, otherwise compatible won't validate for
48 - allwinner,sun7i-a20-gmac
49 - allwinner,sun8i-a83t-emac
50 - allwinner,sun8i-h3-emac
51 - allwinner,sun8i-r40-emac
52 - allwinner,sun8i-v3s-emac
53 - allwinner,sun50i-a64-emac
54 - amlogic,meson6-dwmac
55 - amlogic,meson8b-dwmac
56 - amlogic,meson8m2-dwmac
57 - amlogic,meson-gxbb-dwmac
58 - amlogic,meson-axg-dwmac
60 - rockchip,rk3128-gmac
61 - rockchip,rk3228-gmac
62 - rockchip,rk3288-gmac
63 - rockchip,rk3328-gmac
64 - rockchip,rk3366-gmac
65 - rockchip,rk3368-gmac
66 - rockchip,rk3399-gmac
67 - rockchip,rv1108-gmac
87 - description: Combined signal for various interrupt events
88 - description: The interrupt to manage the remote wake-up packet detection
89 - description: The interrupt that occurs when Rx exits the LPI state
102 additionalItems: true
104 - description: GMAC main clock
105 - description: Peripheral registers interface clock
107 PTP reference clock. This clock is used for programming the
108 Timestamp Addend Register. If not passed then the system
109 clock will be used and this is fine on some platforms.
114 additionalItems: true
130 $ref: ethernet-controller.yaml#/properties/phy-connection-type
132 The property is identical to 'phy-mode', and assumes that there is mode
133 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
134 can be passive (no SW requirement), and requires that the MAC operate
135 in a different mode than the PHY in order to function.
138 $ref: /schemas/types.yaml#/definitions/phandle
140 AXI BUS Mode parameters. Phandle to a node that can contain the
142 * snps,lpi_en, enable Low Power Interface
143 * snps,xit_frm, unlock on WoL
144 * snps,wr_osr_lmt, max write outstanding req. limit
145 * snps,rd_osr_lmt, max read outstanding req. limit
146 * snps,kbbe, do not cross 1KiB boundary.
147 * snps,blen, this is a vector of supported burst length.
148 * snps,fb, fixed-burst
149 * snps,mb, mixed-burst
150 * snps,rb, rebuild INCRx Burst
153 $ref: /schemas/types.yaml#/definitions/phandle
155 Multiple RX Queues parameters. Phandle to a node that can
156 contain the following properties
157 * snps,rx-queues-to-use, number of RX queues to be used in the
159 * Choose one of these RX scheduling algorithms
160 * snps,rx-sched-sp, Strict priority
161 * snps,rx-sched-wsp, Weighted Strict priority
163 * Choose one of these modes
164 * snps,dcb-algorithm, Queue to be enabled as DCB
165 * snps,avb-algorithm, Queue to be enabled as AVB
166 * snps,map-to-dma-channel, Channel to map
167 * Specifiy specific packet routing
168 * snps,route-avcp, AV Untagged Control packets
169 * snps,route-ptp, PTP Packets
170 * snps,route-dcbcp, DCB Control Packets
171 * snps,route-up, Untagged Packets
172 * snps,route-multi-broad, Multicast & Broadcast Packets
173 * snps,priority, bitmask of the tagged frames priorities assigned to
177 $ref: /schemas/types.yaml#/definitions/phandle
179 Multiple TX Queues parameters. Phandle to a node that can
180 contain the following properties
181 * snps,tx-queues-to-use, number of TX queues to be used in the
183 * Choose one of these TX scheduling algorithms
184 * snps,tx-sched-wrr, Weighted Round Robin
185 * snps,tx-sched-wfq, Weighted Fair Queuing
186 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
187 * snps,tx-sched-sp, Strict priority
189 * snps,weight, TX queue weight (if using a DCB weight
191 * Choose one of these modes
192 * snps,dcb-algorithm, TX queue will be working in DCB
193 * snps,avb-algorithm, TX queue will be working in AVB
194 [Attention] Queue 0 is reserved for legacy traffic
195 and so no AVB is available in this queue.
196 * Configure Credit Base Shaper (if AVB Mode selected)
197 * snps,send_slope, enable Low Power Interface
198 * snps,idle_slope, unlock on WoL
199 * snps,high_credit, max write outstanding req. limit
200 * snps,low_credit, max read outstanding req. limit
201 * snps,priority, bitmask of the priorities assigned to the queue.
202 When a PFC frame is received with priorities matching the bitmask,
203 the queue is blocked from transmitting for the pause time specified
212 snps,reset-active-low:
214 $ref: /schemas/types.yaml#/definitions/flag
216 Indicates that the PHY Reset is active low
218 snps,reset-delays-us:
221 Triplet of delays. The 1st cell is reset pre-delay in micro
222 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
223 cell is reset post-delay in micro seconds.
228 $ref: /schemas/types.yaml#/definitions/flag
230 Use Address-Aligned Beats
233 $ref: /schemas/types.yaml#/definitions/flag
235 Program the DMA to use the fixed burst mode
238 $ref: /schemas/types.yaml#/definitions/flag
240 Program the DMA to use the mixed burst mode
242 snps,force_thresh_dma_mode:
243 $ref: /schemas/types.yaml#/definitions/flag
245 Force DMA to use the threshold mode for both tx and rx
247 snps,force_sf_dma_mode:
248 $ref: /schemas/types.yaml#/definitions/flag
250 Force DMA to use the Store and Forward mode for both tx and
251 rx. This flag is ignored if force_thresh_dma_mode is set.
253 snps,en-tx-lpi-clockgating:
254 $ref: /schemas/types.yaml#/definitions/flag
256 Enable gating of the MAC TX clock during TX low-power mode
258 snps,multicast-filter-bins:
259 $ref: /schemas/types.yaml#/definitions/uint32
261 Number of multicast filter hash bins supported by this device
264 snps,perfect-filter-entries:
265 $ref: /schemas/types.yaml#/definitions/uint32
267 Number of perfect filter entries supported by this device
271 $ref: /schemas/types.yaml#/definitions/uint32
273 Port selection speed that can be passed to the core when PCS
274 is supported. For example, this is used in case of SGMII and
280 Creates and registers an MDIO bus.
284 const: snps,dwmac-mdio
297 snps,reset-active-low: ["snps,reset-gpio"]
298 snps,reset-delay-us: ["snps,reset-gpio"]
301 - $ref: "ethernet-controller.yaml#"
307 - allwinner,sun7i-a20-gmac
308 - allwinner,sun8i-a83t-emac
309 - allwinner,sun8i-h3-emac
310 - allwinner,sun8i-r40-emac
311 - allwinner,sun8i-v3s-emac
312 - allwinner,sun50i-a64-emac
321 Programmable Burst Length (tx and rx)
322 $ref: /schemas/types.yaml#/definitions/uint32
327 Tx Programmable Burst Length. If set, DMA tx will use this
328 value rather than snps,pbl.
329 $ref: /schemas/types.yaml#/definitions/uint32
334 Rx Programmable Burst Length. If set, DMA rx will use this
335 value rather than snps,pbl.
336 $ref: /schemas/types.yaml#/definitions/uint32
340 $ref: /schemas/types.yaml#/definitions/flag
342 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
343 rev < 3.50, don\'t multiply the values by 4.
350 - allwinner,sun7i-a20-gmac
351 - allwinner,sun8i-a83t-emac
352 - allwinner,sun8i-h3-emac
353 - allwinner,sun8i-r40-emac
354 - allwinner,sun8i-v3s-emac
355 - allwinner,sun50i-a64-emac
366 $ref: /schemas/types.yaml#/definitions/flag
368 Enables the TSO feature otherwise it will be managed by
369 MAC HW capability register.
371 additionalProperties: true
375 stmmac_axi_setup: stmmac-axi-config {
376 snps,wr_osr_lmt = <0xf>;
377 snps,rd_osr_lmt = <0xf>;
378 snps,blen = <256 128 64 32 0 0 0>;
381 mtl_rx_setup: rx-queues-config {
382 snps,rx-queues-to-use = <1>;
386 snps,map-to-dma-channel = <0x0>;
387 snps,priority = <0x0>;
391 mtl_tx_setup: tx-queues-config {
392 snps,tx-queues-to-use = <2>;
395 snps,weight = <0x10>;
397 snps,priority = <0x0>;
402 snps,send_slope = <0x1000>;
403 snps,idle_slope = <0x1000>;
404 snps,high_credit = <0x3E800>;
405 snps,low_credit = <0xFFC18000>;
406 snps,priority = <0x1>;
410 gmac0: ethernet@e0800000 {
411 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
412 reg = <0xe0800000 0x8000>;
413 interrupt-parent = <&vic1>;
414 interrupts = <24 23 22>;
415 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
416 mac-address = [000000000000]; /* Filled in by U-Boot */
417 max-frame-size = <3800>;
419 snps,multicast-filter-bins = <256>;
420 snps,perfect-filter-entries = <128>;
421 rx-fifo-depth = <16384>;
422 tx-fifo-depth = <16384>;
424 clock-names = "stmmaceth";
425 snps,axi-config = <&stmmac_axi_setup>;
426 snps,mtl-rx-config = <&mtl_rx_setup>;
427 snps,mtl-tx-config = <&mtl_tx_setup>;
429 #address-cells = <1>;
431 compatible = "snps,dwmac-mdio";
432 phy1: ethernet-phy@0 {
438 # FIXME: We should set it, but it would report all the generic
439 # properties as additional properties.
440 # additionalProperties: false