1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ40xx MDIO Controller
10 - Robert Marko <robert.marko@sartura.hr>
23 - const: qcom,ipq4019-mdio
35 the first Address and length of the register set for the MDIO controller.
36 the second Address and length of the register for ethernet LDO, this second
37 address range is only required by the platform IPQ50xx.
41 - description: MDIO clock source frequency fixed to 100MHZ
45 - const: gcc_mdio_ahb_clk
49 The MDIO bus clock that must be output by the MDIO bus hardware, if
50 absent, the default hardware values are used.
52 MDC rate is feed by an external clock (fixed 100MHz) and is divider
53 internally. The default divider is /256 resulting in the default rate
56 To follow 802.3 standard that instruct up to 2.5MHz by default, if
57 this property is not declared and the divider is set to /256, by
58 default 1.5625Mhz is select.
59 enum: [ 390625, 781250, 1562500, 3125000, 6250000, 12500000 ]
88 unevaluatedProperties: false
95 compatible = "qcom,ipq4019-mdio";
98 ethphy0: ethernet-phy@0 {
102 ethphy1: ethernet-phy@1 {
106 ethphy2: ethernet-phy@2 {
110 ethphy3: ethernet-phy@3 {
114 ethphy4: ethernet-phy@4 {