1 * Marvell Armada 375 Ethernet Controller (PPv2.1)
2 Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
6 - compatible: should be one of:
7 "marvell,armada-375-pp2"
8 "marvell,armada-7k-pp2"
9 - reg: addresses and length of the register sets for the device.
10 For "marvell,armada-375-pp2", must contain the following register
12 - common controller registers
14 - one register area per Ethernet port
15 For "marvell,armada-7k-pp2", must contain the following register
17 - packet processor registers
18 - networking interfaces registers
20 - clocks: pointers to the reference clocks for this device, consequently:
21 - main controller clock (for both armada-375-pp2 and armada-7k-pp2)
22 - GOP clock (for both armada-375-pp2 and armada-7k-pp2)
23 - MG clock (only for armada-7k-pp2)
24 - clock-names: names of used clocks, must be "pp_clk", "gop_clk" and
25 "mg_clk" (the latter only for armada-7k-pp2).
27 The ethernet ports are represented by subnodes. At least one port is
30 Required properties (port):
32 - interrupts: interrupt for the port
33 - port-id: ID of the port from the MAC point of view
34 - gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the
35 GOP (Group Of Ports) point of view. This ID is used to index the
36 per-port registers in the second register area.
37 - phy-mode: See ethernet.txt file in the same directory
39 Optional properties (port):
41 - marvell,loopback: port is loopback mode
42 - phy: a phandle to a phy node defining the PHY address (as the reg
43 property, a single integer).
44 - interrupt-names: if more than a single interrupt for rx is given, must
45 be the name associated to the interrupts listed. Valid
46 names are: "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3",
48 - marvell,system-controller: a phandle to the system controller.
50 Example for marvell,armada-375-pp2:
53 compatible = "marvell,armada-375-pp2";
54 reg = <0xf0000 0xa000>,
58 clocks = <&gateclk 3>, <&gateclk 19>;
59 clock-names = "pp_clk", "gop_clk";
62 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
69 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
76 Example for marvell,armada-7k-pp2:
78 cpm_ethernet: ethernet@0 {
79 compatible = "marvell,armada-7k-pp22";
80 reg = <0x0 0x100000>, <0x129000 0xb000>;
81 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
82 clock-names = "pp_clk", "gop_clk", "gp_clk";
85 interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
86 <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
87 <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
88 <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
89 <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>;
90 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
91 "tx-cpu3", "rx-shared";
97 interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
98 <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
99 <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
100 <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
101 <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>;
102 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
103 "tx-cpu3", "rx-shared";
109 interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
110 <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
111 <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
112 <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
113 <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>;
114 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
115 "tx-cpu3", "rx-shared";