1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel DWMAC glue layer Device Tree Bindings
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
22 - $ref: "snps,dwmac.yaml#"
30 - const: snps,dwmac-4.10a
34 - description: GMAC main clock
35 - description: PTP reference clock
36 - description: Tx clock
50 # FIXME: Remove defines and include the correct header file
51 # once it is available in mainline.
53 #include <dt-bindings/interrupt-controller/arm-gic.h>
54 #include <dt-bindings/interrupt-controller/irq.h>
55 #define MOVISOC_KMB_PSS_GBE
56 #define MOVISOC_KMB_PSS_AUX_GBE_PTP
57 #define MOVISOC_KMB_PSS_AUX_GBE_TX
59 stmmac_axi_setup: stmmac-axi-config {
61 snps,wr_osr_lmt = <0x0>;
62 snps,rd_osr_lmt = <0x2>;
63 snps,blen = <0 0 0 0 16 8 4>;
66 mtl_rx_setup: rx-queues-config {
67 snps,rx-queues-to-use = <2>;
71 snps,map-to-dma-channel = <0x0>;
72 snps,priority = <0x0>;
77 snps,map-to-dma-channel = <0x1>;
78 snps,priority = <0x1>;
82 mtl_tx_setup: tx-queues-config {
83 snps,tx-queues-to-use = <2>;
88 snps,priority = <0x0>;
94 snps,priority = <0x1>;
98 gmac0: ethernet@3a000000 {
99 compatible = "intel,keembay-dwmac", "snps,dwmac-4.10a";
100 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
101 interrupt-names = "macirq";
102 reg = <0x3a000000 0x8000>;
103 snps,perfect-filter-entries = <128>;
104 phy-handle = <ð_phy0>;
106 rx-fifo-depth = <4096>;
107 tx-fifo-depth = <4096>;
108 clock-names = "stmmaceth", "ptp_ref", "tx_clk";
109 clocks = <&scmi_clk MOVISOC_KMB_PSS_GBE>,
110 <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_PTP>,
111 <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_TX>;
113 snps,axi-config = <&stmmac_axi_setup>;
114 snps,mtl-rx-config = <&mtl_rx_setup>;
115 snps,mtl-tx-config = <&mtl_tx_setup>;
120 #address-cells = <1>;
122 compatible = "snps,dwmac-mdio";