3 The MDIO is a bus to which the PHY devices are connected. For each
4 device that exists on this bus, a child node should be created. See
5 the definition of the PHY node in booting-without-of.txt for an example
6 of how to define a PHY.
9 - reg : Offset and length of the register set for the device, and optionally
10 the offset and length of the TBIPA register (TBI PHY address
11 register). If TBIPA register is not specified, the driver will
12 attempt to infer it from the register set specified (your mileage may
14 - compatible : Should define the compatible device type for the
15 mdio. Currently supported strings/devices are:
22 When device_type is "mdio", the following strings are also considered:
30 compatible = "fsl,gianfar-mdio";
37 * TBI Internal MDIO bus
39 As of this writing, every tsec is associated with an internal TBI PHY.
40 This PHY is accessed through the local MDIO bus. These buses are defined
41 similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi".
42 The TBI PHYs underneath them are similar to normal PHYs, but the reg property
43 is considered instructive, rather than descriptive. The reg property should
44 be chosen so it doesn't interfere with other PHYs on the bus.
46 * Gianfar-compatible ethernet nodes
50 - device_type : Should be "network"
51 - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
52 - compatible : Should be "gianfar"
53 - reg : Offset and length of the register set for the device
54 - interrupts : For FEC devices, the first interrupt is the device's
55 interrupt. For TSEC and eTSEC devices, the first interrupt is
56 transmit, the second is receive, and the third is error.
57 - phy-handle : See ethernet.txt file in the same directory.
58 - fixed-link : See fixed-link.txt in the same directory.
59 - phy-connection-type : See ethernet.txt file in the same directory.
60 This property is only really needed if the connection is of type
61 "rgmii-id", as all other connection types are detected by hardware.
62 - fsl,magic-packet : If present, indicates that the hardware supports
63 waking up via magic packet.
64 - fsl,wake-on-filer : If present, indicates that the hardware supports
65 waking up by Filer General Purpose Interrupt (FGPI) asserted on the
66 Rx int line. This is an advanced power management capability allowing
67 certain packet types (user) defined by filer rules to wake up the system.
68 - bd-stash : If present, indicates that the hardware supports stashing
69 buffer descriptors in the L2.
70 - rx-stash-len : Denotes the number of bytes of a received buffer to stash
72 - rx-stash-idx : Denotes the index of the first byte from the received
73 buffer to stash in the L2.
77 device_type = "network";
79 compatible = "gianfar";
80 reg = <0x24000 0x1000>;
81 local-mac-address = [ 00 E0 0C 00 73 00 ];
82 interrupts = <29 2 30 2 34 2>;
83 interrupt-parent = <&mpic>;
87 * Gianfar PTP clock nodes
91 - compatible Should be "fsl,etsec-ptp"
92 - reg Offset and length of the register set for the device
93 - interrupts There should be at least two interrupts. Some devices
94 have as many as four PTP related interrupts.
98 - fsl,cksel Timer reference clock source.
99 - fsl,tclk-period Timer reference clock period in nanoseconds.
100 - fsl,tmr-prsc Prescaler, divides the output clock.
101 - fsl,tmr-add Frequency compensation value.
102 - fsl,tmr-fiper1 Fixed interval period pulse generator.
103 - fsl,tmr-fiper2 Fixed interval period pulse generator.
104 - fsl,max-adj Maximum frequency adjustment in parts per billion.
106 These properties set the operational parameters for the PTP
107 clock. You must choose these carefully for the clock to work right.
108 Here is how to figure good values:
110 TimerOsc = selected reference clock MHz
111 tclk_period = desired clock period nanoseconds
112 NominalFreq = 1000 / tclk_period MHz
113 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
114 tmr_add = ceil(2^32 / FreqDivRatio)
115 OutputClock = NominalFreq / tmr_prsc MHz
116 PulseWidth = 1 / OutputClock microseconds
117 FiperFreq1 = desired frequency in Hz
118 FiperDiv1 = 1000000 * OutputClock / FiperFreq1
119 tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
120 max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1
122 The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
123 driver expects that tmr_fiper1 will be correctly set to produce a 1
124 Pulse Per Second (PPS) signal, since this will be offered to the PPS
125 subsystem to synchronize the Linux clock.
127 Reference clock source is determined by the value, which is holded
128 in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
129 value, which will be directly written in those bits, that is why,
130 according to reference manual, the next clock sources can be used:
132 <0> - external high precision timer reference clock (TSEC_TMR_CLK
133 input is used for this purpose);
134 <1> - eTSEC system clock;
135 <2> - eTSEC1 transmit clock;
136 <3> - RTC clock input.
138 When this attribute is not used, eTSEC system clock will serve as
139 IEEE 1588 timer reference clock.
144 compatible = "fsl,etsec-ptp";
145 reg = <0x24E00 0xB0>;
146 interrupts = <12 0x8 13 0x8>;
147 interrupt-parent = < &ipic >;
149 fsl,tclk-period = <10>;
150 fsl,tmr-prsc = <100>;
151 fsl,tmr-add = <0x999999A4>;
152 fsl,tmr-fiper1 = <0x3B9AC9F6>;
153 fsl,tmr-fiper2 = <0x00018696>;
154 fsl,max-adj = <659999998>;