1 * Freescale Fast Ethernet Controller (FEC)
4 - compatible : Should be "fsl,<soc>-fec"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain fec interrupt
7 - phy-mode : See ethernet.txt file in the same directory
10 - phy-supply : regulator that powers the Ethernet PHY.
11 - phy-handle : phandle to the PHY device connected to this device.
12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13 Use instead of phy-handle.
14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
15 hw multi queues. Should specify the tx queue number, otherwise set tx queue
17 - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
18 hw multi queues. Should specify the rx queue number, otherwise set rx queue
20 - fsl,magic-packet : If present, indicates that the hardware supports waking
22 - fsl,err006687-workaround-present: If present indicates that the system has
23 the hardware workaround for ERR006687 applied and does not need a software
25 - gpr: phandle of SoC general purpose register mode. Required for wake on LAN
27 -interrupt-names: names of the interrupts listed in interrupts property in
28 the same order. The defaults if not specified are
29 __Number of interrupts__ __Default__
32 3 "int0", "int1", "int2"
33 4 "int0", "int1", "int2", "pps"
34 The order may be changed as long as they correspond to the interrupts
35 property. Currently, only i.mx7 uses "int1" and "int2". They correspond to
36 tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
37 For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
38 per second interrupt associated with 1588 precision time protocol(PTP).
41 - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
42 according to phy.txt in the same directory
44 Deprecated optional properties:
45 To avoid these, create a phy node according to phy.txt in the same
46 directory, and point the fec's "phy-handle" property to it. Then use
47 the phy's reset binding, again described by phy.txt.
48 - phy-reset-gpios : Should specify the gpio for phy reset
49 - phy-reset-duration : Reset duration in milliseconds. Should present
50 only if property "phy-reset-gpios" is available. Missing the property
51 will have the duration be 1 millisecond. Numbers greater than 1000 are
52 invalid and 1 millisecond will be used instead.
53 - phy-reset-active-high : If present then the reset sequence using the GPIO
54 specified in the "phy-reset-gpios" property is reversed (H=reset state,
56 - phy-reset-post-delay : Post reset delay in milliseconds. If present then
57 a delay of phy-reset-post-delay milliseconds will be observed after the
58 phy-reset-gpios has been toggled. Can be omitted thus no delay is
59 observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
64 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
65 reg = <0x83fec000 0x4000>;
68 phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
69 local-mac-address = [00 04 9F 01 1B B9];
70 phy-supply = <®_fec_supply>;
73 Example with phy specified:
76 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
77 reg = <0x83fec000 0x4000>;
80 phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
81 local-mac-address = [00 04 9F 01 1B B9];
82 phy-supply = <®_fec_supply>;
83 phy-handle = <ðphy>;
85 ethphy: ethernet-phy@6 {
86 compatible = "ethernet-phy-ieee802.3-c22";