1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ethernet Controller Generic Binding
10 - David S. Miller <davem@davemloft.net>
14 pattern: "^ethernet(@.*)?$"
17 $ref: /schemas/types.yaml#/definitions/string
18 description: Human readable label on a port of a box.
22 Specifies the MAC address that was assigned to the network device.
23 $ref: /schemas/types.yaml#/definitions/uint8-array
29 Specifies the MAC address that was last used by the boot
30 program; should be used in cases where the MAC address assigned
31 to the device by the boot program is different from the
32 local-mac-address property.
33 $ref: /schemas/types.yaml#/definitions/uint8-array
38 $ref: /schemas/types.yaml#/definitions/uint32
40 Maximum transfer unit (IEEE defined MTU), rather than the
41 maximum frame size (there\'s contradiction in the Devicetree
45 $ref: /schemas/types.yaml#/definitions/uint32
47 Specifies maximum speed in Mbit/s supported by the device.
52 Reference to an nvmem node for the MAC address
59 Specifies interface type between the Ethernet device and a physical
62 # There is not a standard bus between the MAC and the PHY,
63 # something proprietary is being used to embed the PHY in the
76 # RX and TX delays are added by the MAC when required
79 # RGMII with internal RX and TX delays provided by the PHY,
80 # the MAC should not add the RX or TX delays in this case
83 # RGMII with internal RX delay provided by the PHY, the MAC
84 # should not add an RX delay in this case
87 # RGMII with internal TX delay provided by the PHY, the MAC
88 # should not add an TX delay in this case
100 # 10GBASE-KR, XFI, SFI
107 $ref: "#/properties/phy-connection-type"
110 $ref: /schemas/types.yaml#/definitions/phandle
112 Specifies a reference to a node representing a PHY device.
115 $ref: "#/properties/phy-handle"
119 $ref: "#/properties/phy-handle"
123 $ref: /schemas/types.yaml#/definitions/uint32
125 The size of the controller\'s receive fifo in bytes. This is used
126 for components that can have configurable receive fifo sizes,
127 and is useful for determining certain configuration settings
128 such as flow control thresholds.
130 rx-internal-delay-ps:
132 RGMII Receive Clock Delay defined in pico seconds.
133 This is used for controllers that have configurable RX internal delays.
134 If this property is present then the MAC applies the RX delay.
137 $ref: /schemas/types.yaml#/definitions/phandle
139 Specifies a reference to a node representing a SFP cage.
142 $ref: /schemas/types.yaml#/definitions/uint32
144 The size of the controller\'s transmit fifo in bytes. This
145 is used for components that can have configurable fifo sizes.
147 tx-internal-delay-ps:
149 RGMII Transmit Clock Delay defined in pico seconds.
150 This is used for controllers that have configurable TX internal delays.
151 If this property is present then the MAC applies the TX delay.
155 Specifies the PHY management type. If auto is set and fixed-link
156 is not specified, it uses MDIO for management.
157 $ref: /schemas/types.yaml#/definitions/string
173 Emulated PHY ID, choose any but unique to the all
174 specified fixed-links
178 Duplex configuration. 0 for half duplex or 1 for
181 - enum: [10, 100, 1000, 2500, 10000]
183 Link speed in Mbits/sec.
187 Pause configuration. 0 for no pause, 1 for pause
191 Asymmetric pause configuration. 0 for no asymmetric
192 pause, 1 for asymmetric pause
202 $ref: /schemas/types.yaml#/definitions/uint32
203 enum: [10, 100, 1000, 2500, 10000]
206 $ref: /schemas/types.yaml#/definitions/flag
208 Indicates that full-duplex is used. When absent, half
212 $ref: /schemas/types.yaml#definitions/flag
214 Indicates that pause should be enabled.
217 $ref: /schemas/types.yaml#/definitions/flag
219 Indicates that asym_pause should be enabled.
224 GPIO to determine if the link is up
229 additionalProperties: true