1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/dsa/realtek.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek switches for unmanaged switches
13 - Linus Walleij <linus.walleij@linaro.org>
16 Realtek advertises these chips as fast/gigabit switches or unmanaged
17 switches. They can be controlled using different interfaces, like SMI,
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
22 not use the MDIO protocol. This binding defines how to specify the
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
24 and it must be inserted inside a platform node.
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
45 realtek,rtl8365mb: 4+1 ports
46 realtek,rtl8366: 5+1 ports
47 realtek,rtl8366rb: 5+1 ports
48 realtek,rtl8366s: 5+1 ports
51 realtek,rtl8367rb: 5+2 ports
52 realtek,rtl8367s: 5+2 ports
53 realtek,rtl8368s: 8 ports
54 realtek,rtl8369: 8+1 ports
55 realtek,rtl8370: 8+2 ports
58 description: GPIO line for the MDC clock line.
62 description: GPIO line for the MDIO data line.
66 description: GPIO to be used to reset the whole device
72 if the LED drivers are not used in the hardware design,
73 this will disable them so they are not turned on
79 This defines an interrupt controller with an IRQ line (typically
80 a GPIO) that will demultiplex and handle the interrupt from the single
81 interrupt line coming out of one of the Realtek switch chips. It most
82 importantly provides link up/down interrupts to the PHY blocks inside
87 interrupt-controller: true
92 A single IRQ line from the switch, either active LOW or HIGH
101 - interrupt-controller
106 $ref: /schemas/net/mdio.yaml#
107 unevaluatedProperties: false
111 const: realtek,smi-mdio
144 unevaluatedProperties: false
148 #include <dt-bindings/gpio/gpio.h>
149 #include <dt-bindings/interrupt-controller/irq.h>
153 compatible = "realtek,rtl8366rb";
154 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
155 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
156 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
157 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
159 switch_intc1: interrupt-controller {
160 /* GPIO 15 provides the interrupt */
161 interrupt-parent = <&gpio0>;
162 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
163 interrupt-controller;
164 #address-cells = <0>;
165 #interrupt-cells = <1>;
169 #address-cells = <1>;
174 phy-handle = <&phy0>;
179 phy-handle = <&phy1>;
184 phy-handle = <&phy2>;
189 phy-handle = <&phy3>;
194 phy-handle = <&phy4>;
209 compatible = "realtek,smi-mdio";
210 #address-cells = <1>;
213 phy0: ethernet-phy@0 {
215 interrupt-parent = <&switch_intc1>;
218 phy1: ethernet-phy@1 {
220 interrupt-parent = <&switch_intc1>;
223 phy2: ethernet-phy@2 {
225 interrupt-parent = <&switch_intc1>;
228 phy3: ethernet-phy@3 {
230 interrupt-parent = <&switch_intc1>;
233 phy4: ethernet-phy@4 {
235 interrupt-parent = <&switch_intc1>;
243 #include <dt-bindings/gpio/gpio.h>
244 #include <dt-bindings/interrupt-controller/irq.h>
248 compatible = "realtek,rtl8365mb";
249 mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
250 mdio-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
251 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
253 switch_intc2: interrupt-controller {
254 interrupt-parent = <&gpio5>;
255 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
256 interrupt-controller;
257 #address-cells = <0>;
258 #interrupt-cells = <1>;
262 #address-cells = <1>;
267 phy-handle = <ðphy0>;
272 phy-handle = <ðphy1>;
277 phy-handle = <ðphy2>;
282 phy-handle = <ðphy3>;
289 tx-internal-delay-ps = <2000>;
290 rx-internal-delay-ps = <2000>;
301 compatible = "realtek,smi-mdio";
302 #address-cells = <1>;
305 ethphy0: ethernet-phy@0 {
307 interrupt-parent = <&switch_intc2>;
310 ethphy1: ethernet-phy@1 {
312 interrupt-parent = <&switch_intc2>;
315 ethphy2: ethernet-phy@2 {
317 interrupt-parent = <&switch_intc2>;
320 ethphy3: ethernet-phy@3 {
322 interrupt-parent = <&switch_intc2>;
330 #include <dt-bindings/gpio/gpio.h>
331 #include <dt-bindings/interrupt-controller/irq.h>
334 #address-cells = <1>;
338 compatible = "realtek,rtl8367s";
341 reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
343 switch_intc3: interrupt-controller {
344 interrupt-parent = <&gpio0>;
345 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
346 interrupt-controller;
347 #address-cells = <0>;
348 #interrupt-cells = <1>;
352 #address-cells = <1>;
382 ethernet = <ðernet>;
384 tx-internal-delay-ps = <2000>;
385 rx-internal-delay-ps = <0>;