Documentation/devicetree/bindings/net/dsa/realtek.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/dsa/realtek.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Realtek switches for unmanaged switches
   8
   9 allOf:
  10   - $ref: dsa.yaml#
  11
  12 maintainers:
  13   - Linus Walleij <linus.walleij@linaro.org>
  14
  15 description:
  16   Realtek advertises these chips as fast/gigabit switches or unmanaged
  17   switches. They can be controlled using different interfaces, like SMI,
  18   MDIO or SPI.
  19
  20   The SMI "Simple Management Interface" is a two-wire protocol using
  21   bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
  22   not use the MDIO protocol. This binding defines how to specify the
  23   SMI-based Realtek devices. The realtek-smi driver is a platform driver
  24   and it must be inserted inside a platform node.
  25
  26   The MDIO-connected switches use MDIO protocol to access their registers.
  27   The realtek-mdio driver is an MDIO driver and it must be inserted inside
  28   an MDIO node.
  29
  30   The compatible string is only used to identify which (silicon) family the
  31   switch belongs to. Roughly speaking, a family is any set of Realtek switches
  32   whose chip identification register(s) have a common location and semantics.
  33   The different models in a given family can be automatically disambiguated by
  34   parsing the chip identification register(s) according to the given family,
  35   avoiding the need for a unique compatible string for each model.
  36
  37 properties:
  38   compatible:
  39     enum:
  40       - realtek,rtl8365mb
  41       - realtek,rtl8366rb
  42     description: |
  43       realtek,rtl8365mb:
  44         Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,
  45         RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,
  46         RTL8367SB, RTL8370MB, RTL8310SR
  47       realtek,rtl8366rb:
  48         Use with models RTL8366RB, RTL8366S
  49
  50   mdc-gpios:
  51     description: GPIO line for the MDC clock line.
  52     maxItems: 1
  53
  54   mdio-gpios:
  55     description: GPIO line for the MDIO data line.
  56     maxItems: 1
  57
  58   reset-gpios:
  59     description: GPIO to be used to reset the whole device
  60     maxItems: 1
  61
  62   realtek,disable-leds:
  63     type: boolean
  64     description: |
  65       if the LED drivers are not used in the hardware design,
  66       this will disable them so they are not turned on
  67       and wasting power.
  68
  69   interrupt-controller:
  70     type: object
  71     description: |
  72       This defines an interrupt controller with an IRQ line (typically
  73       a GPIO) that will demultiplex and handle the interrupt from the single
  74       interrupt line coming out of one of the Realtek switch chips. It most
  75       importantly provides link up/down interrupts to the PHY blocks inside
  76       the ASIC.
  77
  78     properties:
  79
  80       interrupt-controller: true
  81
  82       interrupts:
  83         maxItems: 1
  84         description:
  85           A single IRQ line from the switch, either active LOW or HIGH
  86
  87       '#address-cells':
  88         const: 0
  89
  90       '#interrupt-cells':
  91         const: 1
  92
  93     required:
  94       - interrupt-controller
  95       - '#address-cells'
  96       - '#interrupt-cells'
  97
  98   mdio:
  99     $ref: /schemas/net/mdio.yaml#
 100     unevaluatedProperties: false
 101
 102     properties:
 103       compatible:
 104         const: realtek,smi-mdio
 105
 106 if:
 107   required:
 108     - reg
 109
 110 then:
 111   not:
 112     required:
 113       - mdc-gpios
 114       - mdio-gpios
 115       - mdio
 116
 117   properties:
 118     mdc-gpios: false
 119     mdio-gpios: false
 120     mdio: false
 121
 122 else:
 123   required:
 124     - mdc-gpios
 125     - mdio-gpios
 126     - mdio
 127     - reset-gpios
 128
 129 required:
 130   - compatible
 131
 132     #  - mdc-gpios
 133     #  - mdio-gpios
 134     #  - reset-gpios
 135     #  - mdio
 136
 137 unevaluatedProperties: false
 138
 139 examples:
 140   - |
 141     #include <dt-bindings/gpio/gpio.h>
 142     #include <dt-bindings/interrupt-controller/irq.h>
 143
 144     platform {
 145             switch {
 146                     compatible = "realtek,rtl8366rb";
 147                     /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
 148                     mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
 149                     mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
 150                     reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 151
 152                     switch_intc1: interrupt-controller {
 153                             /* GPIO 15 provides the interrupt */
 154                             interrupt-parent = <&gpio0>;
 155                             interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
 156                             interrupt-controller;
 157                             #address-cells = <0>;
 158                             #interrupt-cells = <1>;
 159                     };
 160
 161                     ports {
 162                             #address-cells = <1>;
 163                             #size-cells = <0>;
 164                             port@0 {
 165                                     reg = <0>;
 166                                     label = "lan0";
 167                                     phy-handle = <&phy0>;
 168                             };
 169                             port@1 {
 170                                     reg = <1>;
 171                                     label = "lan1";
 172                                     phy-handle = <&phy1>;
 173                             };
 174                             port@2 {
 175                                     reg = <2>;
 176                                     label = "lan2";
 177                                     phy-handle = <&phy2>;
 178                             };
 179                             port@3 {
 180                                     reg = <3>;
 181                                     label = "lan3";
 182                                     phy-handle = <&phy3>;
 183                             };
 184                             port@4 {
 185                                     reg = <4>;
 186                                     label = "wan";
 187                                     phy-handle = <&phy4>;
 188                             };
 189                             port@5 {
 190                                     reg = <5>;
 191                                     label = "cpu";
 192                                     ethernet = <&gmac0>;
 193                                     phy-mode = "rgmii";
 194                                     fixed-link {
 195                                             speed = <1000>;
 196                                             full-duplex;
 197                                     };
 198                             };
 199                     };
 200
 201                     mdio {
 202                             compatible = "realtek,smi-mdio";
 203                             #address-cells = <1>;
 204                             #size-cells = <0>;
 205
 206                             phy0: ethernet-phy@0 {
 207                                     reg = <0>;
 208                                     interrupt-parent = <&switch_intc1>;
 209                                     interrupts = <0>;
 210                             };
 211                             phy1: ethernet-phy@1 {
 212                                     reg = <1>;
 213                                     interrupt-parent = <&switch_intc1>;
 214                                     interrupts = <1>;
 215                             };
 216                             phy2: ethernet-phy@2 {
 217                                     reg = <2>;
 218                                     interrupt-parent = <&switch_intc1>;
 219                                     interrupts = <2>;
 220                             };
 221                             phy3: ethernet-phy@3 {
 222                                     reg = <3>;
 223                                     interrupt-parent = <&switch_intc1>;
 224                                     interrupts = <3>;
 225                             };
 226                             phy4: ethernet-phy@4 {
 227                                     reg = <4>;
 228                                     interrupt-parent = <&switch_intc1>;
 229                                     interrupts = <12>;
 230                             };
 231                     };
 232             };
 233     };
 234
 235   - |
 236     #include <dt-bindings/gpio/gpio.h>
 237     #include <dt-bindings/interrupt-controller/irq.h>
 238
 239     platform {
 240             switch {
 241                     compatible = "realtek,rtl8365mb";
 242                     mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
 243                     mdio-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 244                     reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
 245
 246                     switch_intc2: interrupt-controller {
 247                             interrupt-parent = <&gpio5>;
 248                             interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 249                             interrupt-controller;
 250                             #address-cells = <0>;
 251                             #interrupt-cells = <1>;
 252                     };
 253
 254                     ports {
 255                             #address-cells = <1>;
 256                             #size-cells = <0>;
 257                             port@0 {
 258                                     reg = <0>;
 259                                     label = "swp0";
 260                                     phy-handle = <&ethphy0>;
 261                             };
 262                             port@1 {
 263                                     reg = <1>;
 264                                     label = "swp1";
 265                                     phy-handle = <&ethphy1>;
 266                             };
 267                             port@2 {
 268                                     reg = <2>;
 269                                     label = "swp2";
 270                                     phy-handle = <&ethphy2>;
 271                             };
 272                             port@3 {
 273                                     reg = <3>;
 274                                     label = "swp3";
 275                                     phy-handle = <&ethphy3>;
 276                             };
 277                             port@6 {
 278                                     reg = <6>;
 279                                     label = "cpu";
 280                                     ethernet = <&fec1>;
 281                                     phy-mode = "rgmii";
 282                                     tx-internal-delay-ps = <2000>;
 283                                     rx-internal-delay-ps = <2000>;
 284
 285                                     fixed-link {
 286                                             speed = <1000>;
 287                                             full-duplex;
 288                                             pause;
 289                                     };
 290                             };
 291                     };
 292
 293                     mdio {
 294                             compatible = "realtek,smi-mdio";
 295                             #address-cells = <1>;
 296                             #size-cells = <0>;
 297
 298                             ethphy0: ethernet-phy@0 {
 299                                     reg = <0>;
 300                                     interrupt-parent = <&switch_intc2>;
 301                                     interrupts = <0>;
 302                             };
 303                             ethphy1: ethernet-phy@1 {
 304                                     reg = <1>;
 305                                     interrupt-parent = <&switch_intc2>;
 306                                     interrupts = <1>;
 307                             };
 308                             ethphy2: ethernet-phy@2 {
 309                                     reg = <2>;
 310                                     interrupt-parent = <&switch_intc2>;
 311                                     interrupts = <2>;
 312                             };
 313                             ethphy3: ethernet-phy@3 {
 314                                     reg = <3>;
 315                                     interrupt-parent = <&switch_intc2>;
 316                                     interrupts = <3>;
 317                             };
 318                     };
 319             };
 320     };
 321
 322   - |
 323     #include <dt-bindings/gpio/gpio.h>
 324     #include <dt-bindings/interrupt-controller/irq.h>
 325
 326     mdio {
 327             #address-cells = <1>;
 328             #size-cells = <0>;
 329
 330             switch@29 {
 331                     compatible = "realtek,rtl8365mb";
 332                     reg = <29>;
 333
 334                     reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
 335
 336                     switch_intc3: interrupt-controller {
 337                             interrupt-parent = <&gpio0>;
 338                             interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 339                             interrupt-controller;
 340                             #address-cells = <0>;
 341                             #interrupt-cells = <1>;
 342                     };
 343
 344                     ports {
 345                             #address-cells = <1>;
 346                             #size-cells = <0>;
 347
 348                             port@0 {
 349                                     reg = <0>;
 350                                     label = "lan4";
 351                             };
 352
 353                             port@1 {
 354                                     reg = <1>;
 355                                     label = "lan3";
 356                             };
 357
 358                             port@2 {
 359                                     reg = <2>;
 360                                     label = "lan2";
 361                             };
 362
 363                             port@3 {
 364                                     reg = <3>;
 365                                     label = "lan1";
 366                             };
 367
 368                             port@4 {
 369                                     reg = <4>;
 370                                     label = "wan";
 371                             };
 372
 373                             port@7 {
 374                                     reg = <7>;
 375                                     ethernet = <&ethernet>;
 376                                     phy-mode = "rgmii";
 377                                     tx-internal-delay-ps = <2000>;
 378                                     rx-internal-delay-ps = <0>;
 379
 380                                     fixed-link {
 381                                             speed = <1000>;
 382                                             full-duplex;
 383                                     };
 384                             };
 385                     };
 386             };
 387       };