1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
10 - Wolfgang Grandegger <wg@grandegger.com>
20 - renesas,r9a06g032-sja1000 # RZ/N1D
21 - renesas,r9a06g033-sja1000 # RZ/N1S
22 - const: renesas,rzn1-sja1000 # RZ/N1
37 $ref: /schemas/types.yaml#/definitions/uint32
38 description: I/O register width (in bytes) implemented by this device
42 nxp,external-clock-frequency:
43 $ref: /schemas/types.yaml#/definitions/uint32
46 Frequency of the external oscillator clock in Hz.
47 The internal clock frequency used by the SJA1000 is half of that value.
50 $ref: /schemas/types.yaml#/definitions/uint32
54 operation mode of the TX output control logic. Valid values are:
55 <0> : bi-phase output mode
56 <1> : normal output mode (default)
57 <2> : test output mode
58 <3> : clock output mode
61 $ref: /schemas/types.yaml#/definitions/uint32
64 TX output pin configuration. Valid values are any one of the below
65 or combination of TX0 and TX1:
67 <0x02> : TX0 pull-down (default)
69 <0x06> : TX0 push-pull
71 <0x10> : TX1 pull-down
73 <0x30> : TX1 push-pull
75 nxp,clock-out-frequency:
76 $ref: /schemas/types.yaml#/definitions/uint32
78 clock frequency in Hz on the CLKOUT pin.
79 If not specified or if the specified value is 0, the CLKOUT pin
82 nxp,no-comparator-bypass:
84 description: Allows to disable the CAN input comparator.
92 - $ref: can-controller.yaml#
99 - renesas,rzn1-sja1000
107 const: renesas,rzn1-sja1000
113 unevaluatedProperties: false
118 compatible = "technologic,sja1000";
119 reg = <0x1a000 0x100>;
122 nxp,tx-output-config = <0x06>;
123 nxp,external-clock-frequency = <24000000>;
127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
131 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
132 reg = <0x52104000 0x800>;
134 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
135 clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
136 power-domains = <&sysctrl>;