1 STMicroelectronics Flexible Memory Controller 2 (FMC2)
5 - compatible: Should be one of:
7 - reg: NAND flash controller memory areas.
8 First region contains the register location.
9 Regions 2 to 4 respectively contain the data, command,
10 and address space for CS0.
11 Regions 5 to 7 contain the same areas for CS1.
12 - interrupts: The interrupt number
13 - pinctrl-0: Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)
14 - clocks: The clock needed by the NAND flash controller
17 - resets: Reference to a reset controller asserting the FMC controller
18 - dmas: DMA specifiers (see: dma/stm32-mdma.txt)
19 - dma-names: Must be "tx", "rx" and "ecc"
21 * NAND device bindings:
24 - reg: describes the CS lines assigned to the NAND device.
27 - nand-on-flash-bbt: see nand.txt
28 - nand-ecc-strength: see nand.txt
29 - nand-ecc-step-size: see nand.txt
31 The following ECC strength and step size are currently supported:
32 - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Hamming)
33 - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
34 - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) (default)
38 fmc: nand-controller@58002000 {
39 compatible = "st,stm32mp15-fmc2";
40 reg = <0x58002000 0x1000>,
47 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
48 clocks = <&rcc FMC_K>;
49 resets = <&rcc FMC_R>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&fmc_pins_a>;