1 * Qualcomm NAND controller
4 - compatible: must be one of the following:
5 * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
6 SoC and it uses ADM DMA
7 * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
8 IPQ4019 SoC and it uses BAM DMA
9 * "qcom,ipq6018-nand" - for QPIC NAND controller v1.5.0 being used in
10 IPQ6018 SoC and it uses BAM DMA
11 * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
12 IPQ8074 SoC and it uses BAM DMA
14 - reg: MMIO address range
15 - clocks: must contain core clock and always on clock
16 - clock-names: must contain "core" for the core clock and "aon" for the
19 EBI2 specific properties:
20 - dmas: DMA specifier, consisting of a phandle to the ADM DMA
21 controller node and the channel number to be used for
22 NAND. Refer to dma.txt and qcom_adm.txt for more details
23 - dma-names: must be "rxtx"
24 - qcom,cmd-crci: must contain the ADM command type CRCI block instance
25 number specified for the NAND controller on the given
27 - qcom,data-crci: must contain the ADM data type CRCI block instance
28 number specified for the NAND controller on the given
31 QPIC specific properties:
32 - dmas: DMA specifier, consisting of a phandle to the BAM DMA
33 and the channel number to be used for NAND. Refer to
34 dma.txt, qcom_bam_dma.txt for more details
35 - dma-names: must contain all 3 channel names : "tx", "rx", "cmd"
36 - #address-cells: <1> - subnodes give the chip-select number
41 Each controller may contain one or more subnodes to represent enabled
42 chip-selects which (may) contain NAND flash chips. Their properties are as
46 - reg: a single integer representing the chip-select
47 number (e.g., 0, 1, 2, etc.)
48 - #address-cells: see partition.txt
49 - #size-cells: see partition.txt
52 - nand-bus-width: see nand-controller.yaml
53 - nand-ecc-strength: see nand-controller.yaml. If not specified, then ECC strength will
54 be used according to chip requirement and available
57 Each nandcs device node may optionally contain a 'partitions' sub-node, which
58 further contains sub-nodes describing the flash partition mapping. See
59 partition.txt for more detail.
63 nand-controller@1ac00000 {
64 compatible = "qcom,ipq806x-nand";
65 reg = <0x1ac00000 0x800>;
67 clocks = <&gcc EBI2_CLK>,
69 clock-names = "core", "aon";
82 nand-ecc-strength = <4>;
86 compatible = "fixed-partitions";
97 reg = <0x58a0000 0x4000000>;
103 nand-controller@79b0000 {
104 compatible = "qcom,ipq4019-nand";
105 reg = <0x79b0000 0x1000>;
107 clocks = <&gcc GCC_QPIC_CLK>,
108 <&gcc GCC_QPIC_AHB_CLK>;
109 clock-names = "core", "aon";
114 dma-names = "tx", "rx", "cmd";
116 #address-cells = <1>;
121 nand-ecc-strength = <4>;
122 nand-bus-width = <8>;
125 compatible = "fixed-partitions";
126 #address-cells = <1>;
136 reg = <0x58a0000 0x4000000>;