1 * Oxford Semiconductor OXNAS NAND Controller
3 Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.
6 - compatible: "oxsemi,ox820-nand"
7 - reg: Base address and length for NAND mapped memory.
10 - clocks: phandle to the NAND gate clock if needed.
11 - resets: phandle to the NAND reset control if needed.
15 nandc: nand-controller@41000000 {
16 compatible = "oxsemi,ox820-nand";
17 reg = <0x41000000 0x100000>;
18 clocks = <&stdclk CLK_820_NAND>;
19 resets = <&reset RESET_NAND>;
27 nand-ecc-mode = "soft";
28 nand-ecc-algo = "hamming";
32 reg = <0x00000000 0x00e00000>;
38 reg = <0x00e00000 0x07200000>;