1 NXP LPC32xx SoC NAND MLC controller
4 - compatible: "nxp,lpc3220-mlc"
5 - reg: Address and size of the controller
6 - interrupts: The NAND interrupt specification
7 - gpios: GPIO specification for NAND write protect
9 The following required properties are very controller specific. See the LPC32xx
10 User Manual 7.5.14 MLC NAND Timing Register (the values here are specified in
11 Hz, to make them independent of actual clock speed and to provide for good
13 - nxp,tcea_delay: TCEA_DELAY
14 - nxp,busy_delay: BUSY_DELAY
15 - nxp,nand_ta: NAND_TA
16 - nxp,rd_high: RD_HIGH
18 - nxp,wr_high: WR_HIGH
22 - Partitions, see Documentation/devicetree/bindings/mtd/partition.txt
27 compatible = "nxp,lpc3220-mlc";
28 reg = <0x200A8000 0x11000>;
33 nxp,tcea-delay = <333333333>;
34 nxp,busy-delay = <10000000>;
35 nxp,nand-ta = <18181818>;
36 nxp,rd-high = <31250000>;
37 nxp,rd-low = <45454545>;
38 nxp,wr-high = <40000000>;
39 nxp,wr-low = <83333333>;
40 gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
44 reg = <0x00000000 0x00064000>;