1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale General-Purpose Media Interface (GPMI) binding
10 - Han Xu <han.xu@nxp.com>
13 - $ref: "nand-controller.yaml"
16 The GPMI nand controller provides an interface to control the NAND
17 flash chips. The device tree may optionally contain sub-nodes
18 describing partitions of the address space. See partition.txt for
28 - fsl,imx6sx-gpmi-nand
32 - fsl,imx8mm-gpmi-nand
33 - fsl,imx8mn-gpmi-nand
34 - const: fsl,imx7d-gpmi-nand
38 - description: Address and length of gpmi block.
39 - description: Address and length of bch block.
62 - description: SoC gpmi io clock
63 - description: SoC gpmi apb clock
64 - description: SoC gpmi bch clock
65 - description: SoC gpmi bch apb clock
66 - description: SoC per1 bch clock
81 Protect this NAND flash with the minimum ECC strength required.
82 The required ECC strength is automatically discoverable for some
83 flash (e.g., according to the ONFI standard). However, note that
84 if this strength is not discoverable or this property is not enabled,
85 the software may chooses an implementation-defined ECC scheme.
87 fsl,no-blockmark-swap:
90 Don't swap the bad block marker from the OOB area with the byte in
91 the data area but rely on the flash based BBT for identifying bad blocks.
92 NOTE: this is only valid in conjunction with 'nand-on-flash-bbt'.
93 WARNING: on i.MX28 blockmark swapping cannot be disabled for the BootROM
94 in the FCB. Thus, partitions written from Linux with this feature turned
95 on may not be accessible by the BootROM code.
108 unevaluatedProperties: false
112 nand-controller@8000c000 {
113 #address-cells = <1>;
115 compatible = "fsl,imx28-gpmi-nand";
116 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
117 reg-names = "gpmi-nand", "bch";
119 interrupt-names = "bch";
121 clock-names = "gpmi_io";
122 dmas = <&dma_apbh 4>;