1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
16 The Enhanced Secure Digital Host Controller on Freescale i.MX family
17 provides an interface for MMC, SD, and SDIO types of memory cards.
19 This file documents differences between the core properties described
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
44 - const: fsl,imx7d-usdhc
54 boolean, if present, indicate to use controller internal write protection.
58 $ref: /schemas/types.yaml#/definitions/uint32
60 Specify the number of delay cells for override mode.
61 This is used to set the clock delay for DLL(Delay Line) on override mode
62 to select a proper data sampling window in case the clock quality is not good
63 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
64 chapter, DLL (Delay Line) section in RM for details.
68 $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
70 Specify the voltage range in case there are software transparent level
71 shifters on the outputs of the controller. Two cells are required, first
72 cell specifies minimum slot voltage (mV), second cell specifies maximum
76 - description: value for minimum slot voltage
77 - description: value for maximum slot voltage
81 $ref: /schemas/types.yaml#/definitions/uint32
83 Specify the start delay cell point when send first CMD19 in tuning procedure.
87 $ref: /schemas/types.yaml#/definitions/uint32
89 Specify the increasing delay cell steps in tuning procedure.
90 The uSDHC use one delay cell as default increasing step to do tuning process.
91 This property allows user to change the tuning step to more than one delay
92 cells which is useful for some special boards or cards when the default
93 tuning step can't find the proper delay window within limited tuning retries.
96 fsl,strobe-dll-delay-target:
97 $ref: /schemas/types.yaml#/definitions/uint32
99 Specify the strobe dll control slave delay target.
100 This delay target programming host controller loopback read clock, and this
101 property allows user to change the delay target for the strobe input read clock.
102 If not use this property, driver default set the delay target to value 7.
103 Only eMMC HS400 mode need to take care of this property.
109 Handle clocks for the sdhc controller.
122 - const: state_100mhz
123 - const: state_200mhz
131 unevaluatedProperties: false
136 compatible = "fsl,imx51-esdhc";
137 reg = <0x70004000 0x4000>;
143 compatible = "fsl,imx51-esdhc";
144 reg = <0x70008000 0x4000>;
146 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
147 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */