Merge tag 'reset-for-v5.11' of git://git.pengutronix.de/pza/linux into arm/drivers
[linux-2.6-microblaze.git] / Documentation / devicetree / bindings / mfd / allwinner,sun8i-a23-prcm.yaml
1 # SPDX-License-Identifier: GPL-2.0+
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Allwinner A23 PRCM Device Tree Bindings
8
9 maintainers:
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
12
13 deprecated: true
14
15 properties:
16   compatible:
17     const: allwinner,sun8i-a23-prcm
18
19   reg:
20     maxItems: 1
21
22 patternProperties:
23   "^.*(clk|rst|codec).*$":
24     type: object
25
26     properties:
27       compatible:
28         enum:
29           - fixed-factor-clock
30           - allwinner,sun8i-a23-apb0-clk
31           - allwinner,sun8i-a23-apb0-gates-clk
32           - allwinner,sun6i-a31-clock-reset
33           - allwinner,sun8i-a23-codec-analog
34
35     required:
36       - compatible
37
38     allOf:
39       - if:
40           properties:
41             compatible:
42               contains:
43                 const: allwinner,sun8i-a23-apb0-clk
44
45         then:
46           properties:
47             "#clock-cells":
48               const: 0
49
50             # Already checked in the main schema
51             compatible: true
52
53             clocks:
54               maxItems: 1
55
56             clock-output-names:
57               maxItems: 1
58
59             phandle: true
60
61           required:
62             - "#clock-cells"
63             - compatible
64             - clocks
65             - clock-output-names
66
67           additionalProperties: false
68
69       - if:
70           properties:
71             compatible:
72               contains:
73                 const: allwinner,sun8i-a23-apb0-gates-clk
74
75         then:
76           properties:
77             "#clock-cells":
78               const: 1
79               description: >
80                 This additional argument passed to that clock is the
81                 offset of the bit controlling this particular gate in
82                 the register.
83
84             # Already checked in the main schema
85             compatible: true
86
87             clocks:
88               maxItems: 1
89
90             clock-output-names:
91               minItems: 1
92               maxItems: 32
93
94             phandle: true
95
96           required:
97             - "#clock-cells"
98             - compatible
99             - clocks
100             - clock-output-names
101
102           additionalProperties: false
103
104       - if:
105           properties:
106             compatible:
107               contains:
108                 const: allwinner,sun6i-a31-clock-reset
109
110         then:
111           properties:
112             "#reset-cells":
113               const: 1
114
115             # Already checked in the main schema
116             compatible: true
117
118             phandle: true
119
120           required:
121             - "#reset-cells"
122             - compatible
123
124           additionalProperties: false
125
126       - if:
127           properties:
128             compatible:
129               contains:
130                 const: allwinner,sun8i-a23-codec-analog
131
132         then:
133           properties:
134             # Already checked in the main schema
135             compatible: true
136
137             phandle: true
138
139           required:
140             - compatible
141
142           additionalProperties: false
143
144 required:
145   - compatible
146   - reg
147
148 additionalProperties: false
149
150 examples:
151   - |
152     prcm@1f01400 {
153         compatible = "allwinner,sun8i-a23-prcm";
154         reg = <0x01f01400 0x200>;
155
156         ar100: ar100_clk {
157             compatible = "fixed-factor-clock";
158             #clock-cells = <0>;
159             clock-div = <1>;
160             clock-mult = <1>;
161             clocks = <&osc24M>;
162             clock-output-names = "ar100";
163         };
164
165         ahb0: ahb0_clk {
166             compatible = "fixed-factor-clock";
167             #clock-cells = <0>;
168             clock-div = <1>;
169             clock-mult = <1>;
170             clocks = <&ar100>;
171             clock-output-names = "ahb0";
172         };
173
174         apb0: apb0_clk {
175             compatible = "allwinner,sun8i-a23-apb0-clk";
176             #clock-cells = <0>;
177             clocks = <&ahb0>;
178             clock-output-names = "apb0";
179         };
180
181         apb0_gates: apb0_gates_clk {
182             compatible = "allwinner,sun8i-a23-apb0-gates-clk";
183             #clock-cells = <1>;
184             clocks = <&apb0>;
185             clock-output-names = "apb0_pio", "apb0_timer",
186                                  "apb0_rsb", "apb0_uart",
187                                  "apb0_i2c";
188         };
189
190         apb0_rst: apb0_rst {
191             compatible = "allwinner,sun6i-a31-clock-reset";
192             #reset-cells = <1>;
193         };
194
195         codec_analog: codec-analog {
196             compatible = "allwinner,sun8i-a23-codec-analog";
197         };
198     };
199
200 ...