1 Renesas R-Car Video Input driver (rcar_vin)
2 -------------------------------------------
4 The rcar_vin device provides video input capabilities for the Renesas R-Car
7 Each VIN instance has a single parallel input that supports RGB and YUV video,
8 with both external synchronization and BT.656 synchronization for the latter.
9 Depending on the instance the VIN input is connected to external SoC pins, or
10 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
12 - compatible: Must be one or more of the following
13 - "renesas,vin-r8a7743" for the R8A7743 device
14 - "renesas,vin-r8a7744" for the R8A7744 device
15 - "renesas,vin-r8a7745" for the R8A7745 device
16 - "renesas,vin-r8a774a1" for the R8A774A1 device
17 - "renesas,vin-r8a774b1" for the R8A774B1 device
18 - "renesas,vin-r8a774c0" for the R8A774C0 device
19 - "renesas,vin-r8a7778" for the R8A7778 device
20 - "renesas,vin-r8a7779" for the R8A7779 device
21 - "renesas,vin-r8a7790" for the R8A7790 device
22 - "renesas,vin-r8a7791" for the R8A7791 device
23 - "renesas,vin-r8a7792" for the R8A7792 device
24 - "renesas,vin-r8a7793" for the R8A7793 device
25 - "renesas,vin-r8a7794" for the R8A7794 device
26 - "renesas,vin-r8a7795" for the R8A7795 device
27 - "renesas,vin-r8a7796" for the R8A7796 device
28 - "renesas,vin-r8a77965" for the R8A77965 device
29 - "renesas,vin-r8a77970" for the R8A77970 device
30 - "renesas,vin-r8a77980" for the R8A77980 device
31 - "renesas,vin-r8a77990" for the R8A77990 device
32 - "renesas,vin-r8a77995" for the R8A77995 device
33 - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 or RZ/G1 compatible
36 When compatible with the generic version nodes must list the
37 SoC-specific version corresponding to the platform first
38 followed by the generic version.
40 - reg: the register base and size for the device registers
41 - interrupts: the interrupt for the device
42 - clocks: Reference to the parent clock
44 Additionally, an alias named vinX will need to be created to specify
45 which video input device this is.
47 The per-board settings for Gen2 and RZ/G1 platforms:
49 - port - sub-node describing a single endpoint connected to the VIN
50 from external SoC pins as described in video-interfaces.txt[1].
51 Only the first one will be considered as each vin interface has one
54 - Optional properties for endpoint nodes:
55 - hsync-active: see [1] for description. Default is active high.
56 - vsync-active: see [1] for description. Default is active high.
57 If both HSYNC and VSYNC polarities are not specified, embedded
58 synchronization is selected.
59 - field-active-even: see [1] for description. Default is active high.
60 - bus-width: see [1] for description. The selected bus width depends on
61 the SoC type and selected input image format.
62 Valid values are: 8, 10, 12, 16, 24 and 32.
63 - data-shift: see [1] for description. Valid values are 0 and 8.
64 - data-enable-active: polarity of CLKENB signal, see [1] for
65 description. Default is active high.
67 The per-board settings for Gen3 and RZ/G2 platforms:
69 Gen3 and RZ/G2 platforms can support both a single connected parallel input
70 source from external SoC pins (port@0) and/or multiple parallel input sources
71 from local SoC CSI-2 receivers (port@1) depending on SoC.
73 - renesas,id - ID number of the VIN, VINx in the documentation.
75 - port@0 - sub-node describing a single endpoint connected to the VIN
76 from external SoC pins as described in video-interfaces.txt[1].
77 Describing more than one endpoint in port@0 is invalid. Only VIN
78 instances that are connected to external pins should have port@0.
80 Endpoint nodes of port@0 support the optional properties listed in
81 the Gen2 per-board settings description.
83 - port@1 - sub-nodes describing one or more endpoints connected to
84 the VIN from local SoC CSI-2 receivers. The endpoint numbers must
85 use the following schema.
87 - endpoint@0 - sub-node describing the endpoint connected to CSI20
88 - endpoint@1 - sub-node describing the endpoint connected to CSI21
89 - endpoint@2 - sub-node describing the endpoint connected to CSI40
90 - endpoint@3 - sub-node describing the endpoint connected to CSI41
92 Endpoint nodes of port@1 do not support any optional endpoint property.
94 Device node example for Gen2 platforms
95 --------------------------------------
102 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
103 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
104 reg = <0 0xe6ef0000 0 0x1000>;
105 interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
109 Board setup example for Gen2 platforms (vin1 composite video input)
110 -------------------------------------------------------------------
114 pinctrl-0 = <&i2c2_pins>;
115 pinctrl-names = "default";
118 compatible = "adi,adv7180";
125 remote-endpoint = <&vin1ep0>;
131 /* composite video input */
133 pinctrl-0 = <&vin1_pins>;
134 pinctrl-names = "default";
140 remote-endpoint = <&adv7180>;
146 Device node example for Gen3 platforms
147 --------------------------------------
149 vin0: video@e6ef0000 {
150 compatible = "renesas,vin-r8a7795";
151 reg = <0 0xe6ef0000 0 0x1000>;
152 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&cpg CPG_MOD 811>;
154 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
159 #address-cells = <1>;
163 #address-cells = <1>;
168 vin0csi20: endpoint@0 {
170 remote-endpoint= <&csi20vin0>;
172 vin0csi21: endpoint@1 {
174 remote-endpoint= <&csi21vin0>;
176 vin0csi40: endpoint@2 {
178 remote-endpoint= <&csi40vin0>;
184 csi20: csi2@fea80000 {
185 compatible = "renesas,r8a7795-csi2";
186 reg = <0 0xfea80000 0 0x10000>;
187 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
188 clocks = <&cpg CPG_MOD 714>;
189 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
193 #address-cells = <1>;
201 remote-endpoint = <&adv7482_txb>;
206 #address-cells = <1>;
211 csi20vin0: endpoint@0 {
213 remote-endpoint = <&vin0csi20>;
219 [1] video-interfaces.txt common video media interface