1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/renesas,fdp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Fine Display Processor (FDP1)
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 The FDP1 is a de-interlacing module which converts interlaced video to
14 progressive video. It is capable of performing pixel format conversion
15 between YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are
16 supported as an input to the module.
39 $ref: /schemas/types.yaml#/definitions/phandle
41 A phandle referencing the FCP that handles memory accesses for the FDP1.
42 Not allowed on R-Car Gen2, mandatory on R-Car Gen3.
52 additionalProperties: false
56 #include <dt-bindings/clock/renesas-cpg-mssr.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 #include <dt-bindings/power/r8a7795-sysc.h>
61 compatible = "renesas,fdp1";
62 reg = <0xfe940000 0x2400>;
63 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
64 clocks = <&cpg CPG_MOD 119>;
65 power-domains = <&sysc R8A7795_PD_A3VP>;
67 renesas,fcp = <&fcpf0>;