Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2
   3 %YAML 1.2
   4 ---
   5 $id: "http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#"
   6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   7
   8 title: Qualcomm CAMSS ISP
   9
  10 maintainers:
  11   - Robert Foss <robert.foss@linaro.org>
  12
  13 description: |
  14   The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
  15
  16 properties:
  17   compatible:
  18     const: qcom,sdm845-camss
  19
  20   clocks:
  21     minItems: 36
  22     maxItems: 36
  23
  24   clock-names:
  25     items:
  26       - const: camnoc_axi
  27       - const: cpas_ahb
  28       - const: cphy_rx_src
  29       - const: csi0
  30       - const: csi0_src
  31       - const: csi1
  32       - const: csi1_src
  33       - const: csi2
  34       - const: csi2_src
  35       - const: csiphy0
  36       - const: csiphy0_timer
  37       - const: csiphy0_timer_src
  38       - const: csiphy1
  39       - const: csiphy1_timer
  40       - const: csiphy1_timer_src
  41       - const: csiphy2
  42       - const: csiphy2_timer
  43       - const: csiphy2_timer_src
  44       - const: csiphy3
  45       - const: csiphy3_timer
  46       - const: csiphy3_timer_src
  47       - const: gcc_camera_ahb
  48       - const: gcc_camera_axi
  49       - const: slow_ahb_src
  50       - const: soc_ahb
  51       - const: vfe0_axi
  52       - const: vfe0
  53       - const: vfe0_cphy_rx
  54       - const: vfe0_src
  55       - const: vfe1_axi
  56       - const: vfe1
  57       - const: vfe1_cphy_rx
  58       - const: vfe1_src
  59       - const: vfe_lite
  60       - const: vfe_lite_cphy_rx
  61       - const: vfe_lite_src
  62
  63   interrupts:
  64     minItems: 10
  65     maxItems: 10
  66
  67   interrupt-names:
  68     items:
  69       - const: csid0
  70       - const: csid1
  71       - const: csid2
  72       - const: csiphy0
  73       - const: csiphy1
  74       - const: csiphy2
  75       - const: csiphy3
  76       - const: vfe0
  77       - const: vfe1
  78       - const: vfe_lite
  79
  80   iommus:
  81     maxItems: 4
  82
  83   power-domains:
  84     items:
  85       - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
  86       - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
  87       - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
  88
  89   ports:
  90     $ref: /schemas/graph.yaml#/properties/ports
  91
  92     description:
  93       CSI input ports.
  94
  95     properties:
  96       port@0:
  97         $ref: /schemas/graph.yaml#/$defs/port-base
  98         unevaluatedProperties: false
  99         description:
 100           Input port for receiving CSI data.
 101
 102         properties:
 103           endpoint:
 104             $ref: video-interfaces.yaml#
 105             unevaluatedProperties: false
 106
 107             properties:
 108               clock-lanes:
 109                 maxItems: 1
 110
 111               data-lanes:
 112                 minItems: 1
 113                 maxItems: 4
 114
 115             required:
 116               - clock-lanes
 117               - data-lanes
 118
 119       port@1:
 120         $ref: /schemas/graph.yaml#/$defs/port-base
 121         unevaluatedProperties: false
 122         description:
 123           Input port for receiving CSI data.
 124
 125         properties:
 126           endpoint:
 127             $ref: video-interfaces.yaml#
 128             unevaluatedProperties: false
 129
 130             properties:
 131               clock-lanes:
 132                 items:
 133                   - const: 7
 134
 135               data-lanes:
 136                 minItems: 1
 137                 maxItems: 4
 138
 139             required:
 140               - clock-lanes
 141               - data-lanes
 142
 143       port@2:
 144         $ref: /schemas/graph.yaml#/$defs/port-base
 145         unevaluatedProperties: false
 146         description:
 147           Input port for receiving CSI data.
 148
 149         properties:
 150           endpoint:
 151             $ref: video-interfaces.yaml#
 152             unevaluatedProperties: false
 153
 154             properties:
 155               clock-lanes:
 156                 maxItems: 1
 157
 158               data-lanes:
 159                 minItems: 1
 160                 maxItems: 4
 161
 162             required:
 163               - clock-lanes
 164               - data-lanes
 165
 166       port@3:
 167         $ref: /schemas/graph.yaml#/$defs/port-base
 168         unevaluatedProperties: false
 169         description:
 170           Input port for receiving CSI data.
 171
 172         properties:
 173           endpoint:
 174             $ref: video-interfaces.yaml#
 175             unevaluatedProperties: false
 176
 177             properties:
 178               clock-lanes:
 179                 maxItems: 1
 180
 181               data-lanes:
 182                 minItems: 1
 183                 maxItems: 4
 184
 185             required:
 186               - clock-lanes
 187               - data-lanes
 188
 189   reg:
 190     minItems: 10
 191     maxItems: 10
 192
 193   reg-names:
 194     items:
 195       - const: csid0
 196       - const: csid1
 197       - const: csid2
 198       - const: csiphy0
 199       - const: csiphy1
 200       - const: csiphy2
 201       - const: csiphy3
 202       - const: vfe0
 203       - const: vfe1
 204       - const: vfe_lite
 205
 206   vdda-supply:
 207     description:
 208       Definition of the regulator used as analog power supply.
 209
 210 required:
 211   - clock-names
 212   - clocks
 213   - compatible
 214   - interrupt-names
 215   - interrupts
 216   - iommus
 217   - power-domains
 218   - reg
 219   - reg-names
 220   - vdda-supply
 221
 222 additionalProperties: false
 223
 224 examples:
 225   - |
 226     #include <dt-bindings/interrupt-controller/arm-gic.h>
 227     #include <dt-bindings/clock/qcom,camcc-sdm845.h>
 228     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
 229
 230     soc {
 231       #address-cells = <2>;
 232       #size-cells = <2>;
 233
 234       camss: camss@a00000 {
 235         compatible = "qcom,sdm845-camss";
 236
 237         clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
 238           <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
 239           <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
 240           <&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
 241           <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
 242           <&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
 243           <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
 244           <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>,
 245           <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
 246           <&clock_camcc CAM_CC_CSIPHY0_CLK>,
 247           <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>,
 248           <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
 249           <&clock_camcc CAM_CC_CSIPHY1_CLK>,
 250           <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>,
 251           <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
 252           <&clock_camcc CAM_CC_CSIPHY2_CLK>,
 253           <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>,
 254           <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
 255           <&clock_camcc CAM_CC_CSIPHY3_CLK>,
 256           <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>,
 257           <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
 258           <&gcc GCC_CAMERA_AHB_CLK>,
 259           <&gcc GCC_CAMERA_AXI_CLK>,
 260           <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
 261           <&clock_camcc CAM_CC_SOC_AHB_CLK>,
 262           <&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
 263           <&clock_camcc CAM_CC_IFE_0_CLK>,
 264           <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
 265           <&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
 266           <&clock_camcc CAM_CC_IFE_1_AXI_CLK>,
 267           <&clock_camcc CAM_CC_IFE_1_CLK>,
 268           <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
 269           <&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
 270           <&clock_camcc CAM_CC_IFE_LITE_CLK>,
 271           <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
 272           <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>;
 273
 274         clock-names = "camnoc_axi",
 275           "cpas_ahb",
 276           "cphy_rx_src",
 277           "csi0",
 278           "csi0_src",
 279           "csi1",
 280           "csi1_src",
 281           "csi2",
 282           "csi2_src",
 283           "csiphy0",
 284           "csiphy0_timer",
 285           "csiphy0_timer_src",
 286           "csiphy1",
 287           "csiphy1_timer",
 288           "csiphy1_timer_src",
 289           "csiphy2",
 290           "csiphy2_timer",
 291           "csiphy2_timer_src",
 292           "csiphy3",
 293           "csiphy3_timer",
 294           "csiphy3_timer_src",
 295           "gcc_camera_ahb",
 296           "gcc_camera_axi",
 297           "slow_ahb_src",
 298           "soc_ahb",
 299           "vfe0_axi",
 300           "vfe0",
 301           "vfe0_cphy_rx",
 302           "vfe0_src",
 303           "vfe1_axi",
 304           "vfe1",
 305           "vfe1_cphy_rx",
 306           "vfe1_src",
 307           "vfe_lite",
 308           "vfe_lite_cphy_rx",
 309           "vfe_lite_src";
 310
 311         interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
 312           <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
 313           <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
 314           <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
 315           <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
 316           <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
 317           <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
 318           <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
 319           <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
 320           <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
 321
 322         interrupt-names = "csid0",
 323           "csid1",
 324           "csid2",
 325           "csiphy0",
 326           "csiphy1",
 327           "csiphy2",
 328           "csiphy3",
 329           "vfe0",
 330           "vfe1",
 331           "vfe_lite";
 332
 333         iommus = <&apps_smmu 0x0808 0x0>,
 334           <&apps_smmu 0x0810 0x8>,
 335           <&apps_smmu 0x0c08 0x0>,
 336           <&apps_smmu 0x0c10 0x8>;
 337
 338         power-domains = <&clock_camcc IFE_0_GDSC>,
 339           <&clock_camcc IFE_1_GDSC>,
 340           <&clock_camcc TITAN_TOP_GDSC>;
 341
 342         reg = <0 0xacb3000 0 0x1000>,
 343           <0 0xacba000 0 0x1000>,
 344           <0 0xacc8000 0 0x1000>,
 345           <0 0xac65000 0 0x1000>,
 346           <0 0xac66000 0 0x1000>,
 347           <0 0xac67000 0 0x1000>,
 348           <0 0xac68000 0 0x1000>,
 349           <0 0xacaf000 0 0x4000>,
 350           <0 0xacb6000 0 0x4000>,
 351           <0 0xacc4000 0 0x4000>;
 352
 353         reg-names = "csid0",
 354           "csid1",
 355           "csid2",
 356           "csiphy0",
 357           "csiphy1",
 358           "csiphy2",
 359           "csiphy3",
 360           "vfe0",
 361           "vfe1",
 362           "vfe_lite";
 363
 364         vdda-supply = <&reg_2v8>;
 365
 366         ports {
 367           #address-cells = <1>;
 368           #size-cells = <0>;
 369         };
 370       };
 371     };