1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: "http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm Venus video encode and decode accelerators
11 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
14 The Venus Iris2 IP is a video encode and decode accelerator present
19 const: qcom,sc7280-venus
73 additionalProperties: false
85 additionalProperties: false
91 Firmware subnode is needed when the platform does not
114 additionalProperties: false
118 #include <dt-bindings/interrupt-controller/arm-gic.h>
119 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
120 #include <dt-bindings/interconnect/qcom,sc7280.h>
121 #include <dt-bindings/power/qcom-rpmpd.h>
123 venus: video-codec@aa00000 {
124 compatible = "qcom,sc7280-venus";
125 reg = <0x0aa00000 0xd0600>;
126 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
128 clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
129 <&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
130 <&videocc VIDEO_CC_VENUS_AHB_CLK>,
131 <&videocc VIDEO_CC_MVS0_CORE_CLK>,
132 <&videocc VIDEO_CC_MVS0_AXI_CLK>;
133 clock-names = "core", "bus", "iface",
134 "vcodec_core", "vcodec_bus";
136 power-domains = <&videocc MVSC_GDSC>,
137 <&videocc MVS0_GDSC>,
139 power-domain-names = "venus", "vcodec0", "cx";
141 interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
142 <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
143 interconnect-names = "cpu-cfg", "video-mem";
145 iommus = <&apps_smmu 0x2180 0x20>,
146 <&apps_smmu 0x2184 0x20>;
148 memory-region = <&video_mem>;
151 compatible = "venus-decoder";
155 compatible = "venus-encoder";
159 iommus = <&apps_smmu 0x21a2 0x0>;