1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/nxp,imx7-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX7 Mipi CSI2
10 - Rui Miguel Silva <rmfrfs@gmail.com>
13 This is the device node for the MIPI CSI-2 receiver core in i.MX7 soc. It is
14 compatible with previous version of samsung d-phy.
18 const: fsl,imx7-mipi-csi2
41 Phandle to a regulator that provides power to the PHY. This
42 regulator will be managed during the PHY power on/off sequence.
52 The IP main (system bus) clock frequency in Hertz
56 $ref: /schemas/types.yaml#/definitions/uint32
58 Differential receiver (HS-RX) settle time
63 A node containing input and output port nodes with endpoint definitions
65 Documentation/devicetree/bindings/media/video-interfaces.txt
77 Input port node, single endpoint describing the CSI-2 transmitter.
88 $ref: /schemas/types.yaml#/definitions/uint32-array
89 description: See ../video-interfaces.txt
103 additionalProperties: false
105 additionalProperties: false
124 additionalProperties: false
128 #include <dt-bindings/clock/imx7d-clock.h>
129 #include <dt-bindings/interrupt-controller/arm-gic.h>
130 #include <dt-bindings/interrupt-controller/irq.h>
131 #include <dt-bindings/reset/imx7-reset.h>
133 mipi_csi: mipi-csi@30750000 {
134 compatible = "fsl,imx7-mipi-csi2";
135 reg = <0x30750000 0x10000>;
136 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
138 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
139 <&clks IMX7D_MIPI_CSI_ROOT_CLK>,
140 <&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
141 clock-names = "pclk", "wrap", "phy";
142 clock-frequency = <166000000>;
144 power-domains = <&pgc_mipi_phy>;
145 phy-supply = <®_1p0d>;
146 resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
147 reset-names = "mrst";
148 fsl,csis-hs-settle = <3>;
151 #address-cells = <1>;
157 mipi_from_sensor: endpoint {
158 remote-endpoint = <&ov2680_to_mipi>;
166 mipi_vc0_to_csi_mux: endpoint {
167 remote-endpoint = <&csi_mux_from_mipi_vc0>;