1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Qualcomm APCS global block bindings
10 This binding describes the APCS "global" block found in various Qualcomm
14 - Sivaprakash Murugesan <sivaprak@codeaurora.org>
19 - qcom,ipq6018-apcs-apps-global
20 - qcom,ipq8074-apcs-apps-global
21 - qcom,msm8916-apcs-kpss-global
22 - qcom,msm8994-apcs-kpss-global
23 - qcom,msm8996-apcs-hmss-global
24 - qcom,msm8998-apcs-hmss-global
25 - qcom,qcs404-apcs-apps-global
26 - qcom,sc7180-apss-shared
27 - qcom,sdm660-apcs-hmss-global
28 - qcom,sdm845-apss-shared
29 - qcom,sm8150-apss-shared
35 description: phandles to the parent clocks of the clock driver
37 - description: primary pll parent of the clock driver
38 - description: auxiliary parent
56 additionalProperties: false
60 # Example apcs with msm8996
62 #include <dt-bindings/interrupt-controller/arm-gic.h>
63 apcs_glb: mailbox@9820000 {
64 compatible = "qcom,msm8996-apcs-hmss-global";
65 reg = <0x9820000 0x1000>;
71 compatible = "qcom,glink-rpm";
72 interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
73 qcom,rpm-msg-ram = <&rpm_msg_ram>;
74 mboxes = <&apcs_glb 0>;
75 mbox-names = "rpm_hlos";
78 # Example apcs with qcs404
80 #define GCC_APSS_AHB_CLK_SRC 1
81 #define GCC_GPLL0_AO_OUT_MAIN 123
82 apcs: mailbox@b011000 {
83 compatible = "qcom,qcs404-apcs-apps-global";
84 reg = <0x0b011000 0x1000>;
86 clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
87 clock-names = "pll", "aux";