1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments K3 Interrupt Aggregator
10 - Lokesh Vutla <lokeshvutla@ti.com>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
16 The Interrupt Aggregator (INTA) provides a centralized machine
17 which handles the termination of system events to that they can
18 be coherently processed by the host(s) in the system. A maximum
19 of 64 events can be mapped to a single interrupt.
22 +-----------------------------------------+
24 | +--------------+ +------------+ |
25 m ------>| | vint | bit | | 0 |.....|63| vint0 |
26 . | +--------------+ +------------+ | +------+
28 Globalevents ------>| . . |----->| IRQ |
31 n ------>| +--------------+ +------------+ |
32 | | vint | bit | | 0 |.....|63| vintx |
33 | +--------------+ +------------+ |
35 +-----------------------------------------+
37 Configuration of these Intmap registers that maps global events to vint is
38 done by a system controller (like the Device Memory and Security Controller
39 on AM654 SoC). Driver should request the system controller to get the range
40 of global events and vints assigned to the requesting host. Management
41 of these requested resources should be handled by driver and requests
42 system controller to map specific global event to vint, bit pair.
44 Communication between the host processor running an OS and the system
45 controller happens through a protocol called TI System Control Interface
55 interrupt-controller: true
60 $ref: /schemas/types.yaml#/definitions/uint32-matrix
62 Interrupt ranges that converts the INTA output hw irq numbers
63 to parents's input interrupt numbers.
67 "output_irq" specifies the base for inta output irq
69 "parent's input irq" specifies the base for parent irq
71 "limit" specifies the limit for translation
76 - interrupt-controller
82 unevaluatedProperties: false
90 main_udmass_inta: msi-controller@33d00000 {
91 compatible = "ti,sci-inta";
92 reg = <0x0 0x33d00000 0x0 0x100000>;
95 interrupt-parent = <&main_navss_intr>;
97 ti,sci-dev-id = <179>;
98 ti,interrupt-ranges = <0 0 256>;